ZL40295 Datasheet | Microsemi

Data Sheet 20-Output PCIe Gen 1, 2, 3, 4 and 5 Buffer with Ultra-Low Additive Jitter Features - Fully pliant with PCIe Gen 1, 2, 3 , 4, and 5. - 20 Low-Power Push-Pull HCSL PCIe Outputs - Ultra-low additive jitter: 10fs for PCIe 5.0 Ordering Information ZL40295LDG6 ZL40295LDF6 80 pin GQFN Trays 80 pin GQFN Tape and Reel Package size: 6 x 6 mm -40C to +85C - Supports clock frequencies from 0 to 250MHz - Supports 3.3V power supplies - Embedded Low Drop Out (LDO) Voltage regulator provides superior Power Supply Noise Rejection - Maximum output to output skew of 50ps - SMBus Interface - Side-Band Interface (SBI) - Eight OE pins Applications - PCI Express generation 1/2/3/4/5 clock distribution - Intel QPI - Servers - Storage and Data Centers - Switches and Routers - Embedded series termination resistors for 100Ω differential transmission line - Transparent for Spread Spectrum Clock VDD VDD_A CK_IN CK_IN# CK[19:0] ^v SA0_tri ^v SA1_tri SMBDAT SMBCLK PWRGD/PWRDN# v OE#[12:5]/SBI...