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ZL30263 - Any-to-Any Clock Multiplier and Frequency Synthesizer

Download the ZL30263 datasheet PDF. This datasheet also covers the ZL30260 variant, as both devices belong to the same any-to-any clock multiplier and frequency synthesizer family and are provided as variant models within a single manufacturer datasheet.

Key Features

  • Four Flexible Input Clocks.
  • One crystal/CMOS input.
  • Two differential/CMOS inputs.
  • One single-ended/CMOS input.
  • Any input frequency from 9.72MHz to 1.25GHz (300MHz max for CMOS).
  • Activity monitors, automatic or manual switching.
  • Glitchless clock switching by pin or register.
  • 6 or 10 Any-Frequency, Any-Format Outputs.
  • Any output frequency from 1Hz to 1045MHz.
  • High-resolution frac-N APLL with 0ppm error.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (ZL30260-Microsemi.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

Part Number Description Manufacturer
ZL30263 Any-to-Any Clock Multiplier and Frequency Synthesizer Microchip
ZL30260 Any-to-Any Clock Multiplier and Frequency Synthesizer Microchip
ZL30261 Any-to-Any Clock Multiplier and Frequency Synthesizer Microchip
ZL30262 Any-to-Any Clock Multiplier and Frequency Synthesizer Microchip
ZL30264 Any-to-Any Clock Multiplier and Frequency Synthesizer Microchip

Other Datasheets by Microsemi (Microchip)

Part Number Description
ZL30260 Any-to-Any Clock Multiplier and Frequency Synthesizer
ZL30261 Any-to-Any Clock Multiplier and Frequency Synthesizer
ZL30262 Any-to-Any Clock Multiplier and Frequency Synthesizer
ZL30237 Dual Channel Universal NCO Clock Generator
ZL30244 Dual-Channel Any-to-Any Clock Multiplier and Frequency Synthesizer

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
Register Map: Section 6.2 Features • Four Flexible Input Clocks • One crystal/CMOS input • Two differential/CMOS inputs • One single-ended/CMOS input • Any input frequency from 9.72MHz to 1.25GHz (300MHz max for CMOS) • Activity monitors, automatic or manual switching • Glitchless clock switching by pin or register • 6 or 10 Any-Frequency, Any-Format Outputs • Any output frequency from 1Hz to 1045MHz • High-resolution frac-N APLL with 0ppm error • The APLL has a fractional divider and an integer divider to make two independent frequency families • Output jitter from integer multiply and dividers as low as 0.17ps RMS (12kHz-20MHz) • Output jitter from fractional dividers is typically < 1ps RMS, many frequencies <0.