ZL30165 - Quad Clock Translator

Product Overview

Microsemi

Datasheet Details

Part number	ZL30165
Manufacturer	Microsemi
File Size	634.96 KB
Description	Quad Clock Translator
Datasheet	ZL30165 Datasheet
Additional preview pages of the ZL30165 datasheet.

Product details

Description

17 Precise Frequency Monitor (PFM) 18 Guard Soak Timer (GST) 31 Figure 14 "Typical Power-Up Reset and Configuration Circuit" 32 5.1, “ZL30165 Configuration programming“ 85 Register Name: phasemem_limit_ref0 118 Register Name: dpll0_df_offset 162 13.0, “Package Markings“ Change Included availability of customer defined default configurations Updated GPIO[5:6] power-up settings Clarified the PFM measurement interval Corrected the GST description Updated GPIO[5:6] power-up settings Ad

Features

Four independent clock channels.
Four programmable digital PLLs/Numerically Controlled Oscillators (NCOs).
Programmable synthesizers generate any clockrate from 1 kHz to 750 MHz.
Four precision synthesizers generate clocks with low jitter of 0.63 ps RMS for 10 G PHYs.
Programmable digital PLLs synchronize to any clock rate from 1 kHz to 750 MHz.
Flexible two-stage architecture translates between arbitrary data rates, line coding rates and FE.

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Published: Jan 21, 2024 |