MT48LC8M32B2 dram equivalent, synchronous dram.
* PC100 functionality
* Fully synchronous; all signals registered on positive edge of system clock
* Internal pipelined operation; column address can www.Data.
The 256Mb SDRAM is a high-speed CMOS, dynamic random-access memory containing 268,435,456-bits. It is internally configured as a quad-bank DRAM with a synchronous interface (all signals are registered on the positive edge of the clock signal, CLK). E.
Image gallery
TAGS