MT41K128M8
Description
The 1.35V DDR3L SDRAM device is a low-voltage version of the 1.5V DDR3 SDRAM device.
Key Features
- VDD = VDDQ = +1.35V (1.283V to 1.45V)
- Differential bidirectional data strobe
- 8n-bit prefetch architecture
- Differential clock inputs (CK, CK#)
- 8 internal banks
- Nominal and dynamic on-die termination (ODT) for data, strobe, and mask signals
- Programmable CAS (READ) latency (CL)
- Programmable CAS additive latency (AL)
- Programmable CAS (WRITE) latency (CWL)
- Fixed burst length (BL) of 8 and burst chop (BC) of 4 (via the mode register set [MRS])
