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MT5C2568 Datasheet Preview

MT5C2568 Datasheet

32K x 8 SRAM

No Preview Available !

SRAM
FEATURES
• High speed: 10,12,15,20,25 and 35ns
• High-performance, low-power, CMOS double-metal
process
• Single +5V ±1O% power supply
• Easy memory expansion with CE and OE options
• All inputs and outputs are TTL-compatible
OPTIONS
• Timing
IOns access
12ns access
15ns access
20ns access
25ns access
35ns access
MARKING
-10
-12
-15
-20
-25
-35
• Packages
Plastic DIP (300 mil)
Plastic SOJ (300 mil)
None
DJ
• 2V data retention
• Lowpower
L
P
• Temperature
Commercial (O°C to +70°C)
Industrial (-40°C to +85°C)
Automotive (-40°C to +125°C)
Extended (-55°C to +125°C)
None
IT
AT
XT
• Part Number Example: MT5C2568DJ-20 IT
NOTE: Not all combinations of operating temperature, speed, data retention
and low power are necessarily available. Pleasecontact the factory for availabil-
ity of specific part number combinations.
GENERAL DESCRIPTION
The MT5C2568 is organized as a 32,768 x 8 SRAM using
a four-transistor memory cell with a high-speed, low-power
CMOS process. Micron SRAMs are fabricated using double-
layer metal, double-layer polysilicon technology.
For flexibility in high-speed memory applications,
Micron offers chip enable (CE) and output enable (OE) with
this organization. These enhancements can place the out-
puts in High-Z for additional flexibility in system design.
Writing to these devices is accomplished when write
enable (WE) and CE inputs are both LOW. Reading is
32Kx 8 SRAM
PIN ASSIGNMENT (Top View)
28-Pin DIP
(SA-4)
28-Pin SOJ
(SD-2)
A14 1
A12 2
A7 3
A6 4
A5 5
A. 6
A3 7
A2 8
Al 9
AO 10
DOl 11
D02 12
,.D03 13
Vss
28 Vee
27 WE
26 A13
25 A8
24 A9
23 All
22 DE
21 Al0
20 CE
19 D08
18 D07
17 D06
16 D05
15 DO'
A14 1
A12 [ 2
A7 [ 3
AS [ 4
A5 [ 5
i ;A4
A3
A2 [ 8
Al [ 9
AO [ 10
DOl [ 11
DQ2 [ 12
DOS [ 13
V.s [ 14
28 Vee
27 WE
26 A13
25 A8
24 A9
23 A11
22 DE
21 Al0
20 CE
19 D08
18 D07
17 DQ6
16 D05
15 D04
en
<
0
!:i
en
»:s:D:
accomplished when WE remains HIGH and CE and OE go
LOW. The device offers a reduced power standby mode
when disabled. This allows system designers to meet low
standby power requirements.
The "P" version provides a reduction in both operating
current (Icc) and TTL standby current (ISB1). The latter is
achieved through the use ofgated inputs on the WE, OE and
address lines, which also facilitates the design of battery
backed systems. That is, the gated inputs simplify the
design effort and circuitry required to protect against inad-
vertent battery current drain during power-down, when
inputs may be at undefined levels.
All devices operate from a single +5V power supply and
all inputs and outputs are fully TTL-compatible.
MT5C2568
REV. 12193
1-151
Micron Semiconductor, Inc., reseNes the right to change products or specifications without notice.
©1993, Micron Semiconductor, Inc.




Micron

MT5C2568 Datasheet Preview

MT5C2568 Datasheet

32K x 8 SRAM

No Preview Available !

MT5C2568
REV. 12/93
TRUTH TABLE
MODE
1Jf a- we- DO
POWER
STANDBY
X H X HIGH-Z STANDBY
READ
L L H Q ACTIVE
NOT SELECTED H L H HIGH-Z ACTIVE
WRITE
X L L D ACTIVE
1-152
Micron Semiconductor, Inc., reserves the right to change products or specifications without notice.
@1993,MicronSemiconductor,lnc.


Part Number MT5C2568
Description 32K x 8 SRAM
Maker Micron
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MT5C2568 Datasheet PDF






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