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MT5C2564 Datasheet Preview

MT5C2564 Datasheet

64K x 4 SRAM

No Preview Available !

SRAM
FEATURES
• High speed: 10, 12, 15,20,25 and 35ns
• High-performance, low-power, CMOS double-metal
process
• Single +5V ±10% power supply
• Easy memory expansion with CE option
• All inputs and outputs are TTL-compatible
OPTIONS
• Timing
IOns access
12ns access
15ns access
20ns access
25ns access
35ns access
• Packages
Plastic DIP (300 mil)
Plastic SOJ (300 mil)
MARKING
-10
-12
-15
-20
-25
-35
None
DJ
• 2V data retention
• Lowpower
L
P
• Temperature
Commercial (O°C to +70°C)
Industrial (-40°C to +85°C)
Automotive (-40°C to +125°C)
Extended (-55°C to +125°C)
None
IT
AT
XT
• Part Number Example: MT5C2564DJ-35 L
NOTE: Not all combinations of operating temperature, speed, data retention
and low power are necessarily available. Please contactthe factory for availabil-
ity of specific part number combinations.
GENERAL DESCRIPTION
The MT5C2564 is organized as a 65,536 x 4 SRAM using
a four-transistor memory cell with a high-speed, low-power
CMOS process. MicronSRAMs are fabricated using double-
layer metal, double-layer polysilicon technology.
For flexibility in high-speed memory applications,
Micron offers chip enable (CE) with all organizations. This
enhancement can place the outputs in High-Z for addi-
tional flexibility in system design.
64Kx 4 SRAM
PIN ASSIGNMENT (Top View)
24-Pin DIP
(SA-3)
24-Pin SOJ
(SD-1 )
AD 1 '-../ 24 Vee
Al 23 A15
A2 3
A3 4
22 A14
21 UA13
A4 5
20 A12
A5 6
19 All
AS 7
18 A1D
A7 8
A8 9
17 DQ4
P16 D03
A9 10
CE 11
15 D02
14 DOl
Vss 12
13 WE
AD [ 1
~Al 2
A2 3
~A3 4
A4 5
~A5 6
A6 7
~A7 B
AS 9
~A9 10
CE 11
Vss [ 12
24 Vee
23 A15
22 A14
21 A13
20 A12
19 All
18 A1D
17 D04
16 D03
15 D02
14 DOl
13 WE
-(J1
o<
~
en
::D
ls>:
Writing to these devices is accomplished when write
enable (WE) and CE inputs are both LOW. Reading is
accomplished when WE remains HIGH and CE goes LOW.
The device offers a reduced power standby mode when
disabled. This allows system designers to meet low standby
power requirements.
The "P" version provides a reduction in both operating
current (Icc) and TTL standby current (ISBl). The latter is
achieved through the use of gated inputs on the WE and
address lines, which also facilitates the design of battery
backed systems. That is, the gated inputs simplify the
design effort and circuitry required to protect against inad-
vertent battery current drain during power-down, when
inputs may be at undefined levels.
All devices operate from a single +5V power supply and
all inputs and outputs are fully TIL-compatible.
MT5C2564
REV. 12193
1-81
Micron Semiconductor, Inc., reserves the righllo change products or specifications without notice.
©1993, Micron Semiconductor, Inc.




Micron

MT5C2564 Datasheet Preview

MT5C2564 Datasheet

64K x 4 SRAM

No Preview Available !

MT5C2564
REV. 12/93
TRUTH TABLE
MODE
STANDBY
READ
WRITE
CE WE
HX
LH
LL
DO
HIGH-Z
Q
D
POWER
STANDBY
ACTIVE
ACTIVE
1-82
Micron Semiconductor, Inc., reserves the right to change products or specifications without notice
©1993, Micron 8emiconductor, Inc


Part Number MT5C2564
Description 64K x 4 SRAM
Maker Micron
Total Page 10 Pages
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