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MT5C1M4B2 Datasheet Preview

MT5C1M4B2 Datasheet

1-Meg x 4 SRAM

No Preview Available !

ADVANCE
SRAM
FEATURES
• High speed: 12, 15,20, 25 and 35ns
• High-performance, low-power, CMOS double-metal
process
• Multiple center power and ground pins for improved
noise immunity
• Single +5V ±10% power supply
• Easy memory expansion with CE and OE options
• All inputs and outputs are TIL-compatible
• Fast OE access time: 6, 8, 10, 12 and 15ns
OPTIONS
MARKING
• Timing
12ns access
15ns access
20ns access
25ns access
35ns access
-12
-15
-20
-25
-35
• Packages
Plastic SOJ (400 mil)
Plastic TSOP (400 mil)
DJ
TG
• 2V data retention
• Lowpower
L
P
• Temperature
Commercial (O°C to +70°C)
Industrial (-40°C to +85°C)
Automotive (-40°C to +125°C)
Extended (-55°C to +125°C)
None
IT
AT
XT
• Part Number Example: MT5C1M4B2DJ-35 L
NOTE: Not all combinations of operating temperature, speed, data retention
and lowpower are necessarily available. Please contact the factory for availabil-
ity of specific part munber combinations.
GENERAL DESCRIPTION
The MT5C1M4B2 is organized as a 1,048,576 x 4 SRAM
using a four-transistor memory celCwith a high-speed,
low-power CMOS process. Micron 4 Meg SRAMs are fab-
ricated using double-layer metal, triple-layer polysilicon
technology.
This device offers multiple center power and ground pins
for improved performance. For flexibility in high-speed
memory applications, Micron offers chip enable (CE) and
output enable (OE) with this configuration. These enhance-
ments can place the outputs in High-Z for additional flex-
ibility in system design.
1 MEGx 4 SRAM
WITH OUTPUT ENABLE
PIN ASSIGNMENT (Top View)
32-Pin SOJ
(SD-5)
32-Pin TSOP
(SE-1 )
AO
A1
A2
A3
A4
IT
001
Vee
Vss
002
WE
A5
A6
A7
A8
A9
1
4
5
6
7
10
11
12
13
A19
A17
A16
A15
5E
004
Vss
Vee
003
A14
A13
A12
A11
A10
NC
AO
Al
A2
A3
A4
IT
001
Vee
Vss
002
WE
A5
AS
A7
A8
A9
A19
A18
A17
A16
A15
5E
004
Vss
Vee
003
A14
A13
A12
All
Al0
NC
U1
o<
Ci
en
s:»:D:
Writing to this device is accomplished when write enable
(WE) and CE inputs are both LOW. Reading is accom-
plished when WE remains HIGH while output enable (OE)
and CE go LOW. The device offers a reduced power stand-
by mode when disabled. This allows system designers to
meet low standby power requirements.
The "P" version provides a 90 percent reduction in TIL
standby current (ISB1) through the use of gated inputs on the
WE, OE and address lines, which also facilitates the design
of battery backed systems. That is, the gated inputs simplify
the design effort and circuitry required to protect against
inadvertentbatterycurrentdrain duringpower-down,when
inputs may be at undefined levels.
All devices operate from a single +5V power supply and
all inputs and outputs are fully TTL-compatible.
MT5C1M4B2
REV. 12193
1-121
Micron Semiconductor, Inc., reserves the right to change products or specifications without notice.
©1993, Micron Semlconductor,lnc




Micron

MT5C1M4B2 Datasheet Preview

MT5C1M4B2 Datasheet

1-Meg x 4 SRAM

No Preview Available !

CJ1
o<
!:i
en
»s::0
FUNCTIONAL BLOCK DIAGRAM
Vee GND
AO:A19
c:
wu.
U.
:::l
!Xl
ill
c:
Cl
«Cl
c:
w
aCl
uw 4,194,304-BIT
Cl MEMORY ARRAY
~
.ac..:J
!uaz
~
(LSB)
COLUMN DECODER
(LSB)
ADVANCE
MT5C1M4B2
REV.121~
TRUTH TABLE
MOOE
ot CE we- OQ
POWER
STANDBY
X H X HIGH-Z STANDBY
READ
LLH
Q
ACTIVE
NOT SELECTED H L H HIGH-Z ACTIVE
WRITE
XL L
D
ACTIVE
THERMAL IMPEDENCE (EST)16
PACKAGE
NUMBER
OF PINS
6Jc*
(OC/W)
6JA*
(OC/W)
SOJ 32 15 60
TSOP
32 5 70
'The thermal impedence numbers assume the device is socketted
on a PC board and air flow is zero.
1-122
Micron Semiconductor, Inc., reserves the right to change products or specifica1ions without notice.
©1993, Micron Semiconductor, Inc.


Part Number MT5C1M4B2
Description 1-Meg x 4 SRAM
Maker Micron
Total Page 10 Pages
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