MCP14628 Datasheet | Microchip Technology

Features - Dual Output MOSFET Driver for Synchronous Applications - High Peak Output Current: 2A (typical) - Adaptive Cross Conduction Protection - Internal Bootstrap Blocking Device - +36V BOOT Pin Maximum Rating - Enhanced Light Load Efficiency Mode - Low Supply Current: 80 µA (typical) - High Capacitive Load Drive Capability: - 3300 p F in 10 ns (typical) - Tri-State PWM Pin for Power Stage Shutdown - Input Voltage Undervoltage Lockout Protection - Space Saving Packages: - 8-Lead SOIC - 8-Lead 3x3 DFN General Description The MCP14628 is a dual MOSFET gate driver designed to optimally drive two N-Channel MOSFETs arranged in a non-isolated synchronous buck converter topology. With the capability to source 2A peaks typically from both the high-side and low-side drives, the MCP14628 is an ideal panion to buck controllers that lack integrated gate drivers. Additionally, greater design flexibility is offered by allowing the gate drivers to be placed close to the power MOSFETs. The MCP14628 features the capability to sink 3.5A peak typically for the low-side gate drive. This allows the MCP14628 the capability of holding off the low-side power MOSFET during the rising edge of the PHASE node. Internal adaptive cross conduction protection circuitry is also used to mitigate both external power MOSFETs from simultaneously conducting. The low resistance pull-up and pull-down drives allow the MCP14628 to quickly transition a 3300 p F load in typically 10 ns and with a propagation time of typically 20 ns. Bootstrapping for the high-side drive is internally implemented which allows for a reduced system cost and design plexity. The PWM input to the MCP14628 can be tri-stated to force both drive outputs low for true power stage shutdown. Light load system efficiency is improved by using the diode emulation feature of the MCP14628. When the FCCM pin is grounded, diode emulation mode is entered. In this mode, discontinuous conduction is allowed by sensing when the inductor current...