Description
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3.0 “Functional Description” 9 3.1 “Pin-Controlled Automatic Configuration at Reset” 9 3.2 “Local Oscillator or Crystal” 9
3.2.1 “External Oscillator” 9 3.2.2 “External Crystal and On-Chip Driver Circuit” 9
3.3 “Output Clock Configuration” 10 3.3.1 “Output Signal Format, Voltage, and Interfa
Features
- 25 MHz Crystal or CMOS Input.
- Generates PCIe 1, 2, 3, 4, 5, 6 Jitter-Compliant Clocks with CML Outputs.
- Four Default Configurations Selected by Hardware Pins at Reset:
- Config0: 100 MHz on Output OC1 (CML)
- Config1: 100 MHz on OC1, OC2 (CML)
- Config2: 100 MHz on OC1 (CML), OC2 (HSTL)
- Config3: 100 MHz on OC1, OC2 (CML) and 25 MHz LVCMOS on OC3.
- Per-Output Controls (Using SPI or I2C Interface)
- Per-Output Enable/Disable and Glitchless Start/Stop (Stop Hig.