TC8020 Datasheet | Microchip Technology

Features - High-voltage Vertical DMOS Technology - Integrated Gate-to-Source Resistor - Integrated Gate-to-Source Zener Diode - +/- 3.5A at 50V Typical Peak Output - Low Threshold, Low On-resistance - Low Input and Output Capacitance - Fast Switching Speeds - Electrically Isolated N-channel and P-channel MOSFET Pairs Applications - High-voltage Pulsers - Amplifiers - Buffers - Piezoelectric Transducer Drivers - General Purpose Line Drivers - Logic-level Interfaces General Description The TC8020 consists of six pairs of high-voltage, low-threshold N-channel and P-channel MOSFETs in a 56-lead VQFN package. All MOSFETs have integrated the output drain high-voltage diodes, gate-to-source resistors, and gate-to-source Zener diode clamps which are desired for high-voltage pulser applications. The plimentary, high-speed, high-voltage, gate-clamped N-channel and P-channel MOSFET pairs utilize an advanced vertical DMOS structure and a well-proven silicon-gate manufacturing process. This bination produces a device with the power handling capabilities of bipolar transistors and the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, these devices are free from thermal runaway and thermally induced secondary breakdown. Microchip’s vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input and output capacitance, and fast switching speeds are desired. Package Type 56-lead VQFN (Top view) See Table 2-1 for pin information.  2022-2023 Microchip Technology Inc.and its subsidiaries DS20005781B-page 1 Typical Application Circuit +3.3V +12V +12V +12V VPP2 VPP1 1.8 to 3.3V CMOS Input Logic VLL/EN SELA POSA NEGA POSB NEGB SELB AVDD VDD1 VDD2 OP1A ON1A OP2A ON2A OP3A 10n F 10n F 10n F 10n...