PIC24FJ64GB406 Datasheet (PDF) Download
Microchip Technology
PIC24FJ64GB406

Key Features

  • Multiple Power Management Options for Extreme Power Reduction: - VBAT allows for lowest power consumption on backup battery (with or without RTCC) - Deep Sleep allows near total power-down with the ability to wake-up on external triggers - Sleep and Idle modes selectively shut down peripherals and/or core for substantial power reduction and fast wake-up - Doze mode allows CPU to run at a lower clock speed than peripherals
  • Alternate Clock modes allow On-the-Fly Switching to a Lower Clock Speed for Selective Power Reduction
  • Extreme Low-Power Current Consumption for Deep Sleep: - WDT: 650 nA @ 2V typical - RTCC: 650 nA @ 32 kHz, 2V typical - Deep Sleep current, 60 nA typical
  • 160 A/MHz in Run mode High-Performance CPU
  • Modified Harvard Architecture
  • Up to 16 MIPS Operation @ 32 MHz
  • 8 MHz Internal Oscillator: - 96 MHz PLL option - Multiple clock divide options - Run-time self-calibration capability for maintaining better than ±0.20% accuracy - Fast start-up
  • 17-Bit x 17-Bit Single-Cycle Hardware Fractional/Integer Multiplier
  • 32-Bit by 16-Bit Hardware Divider
  • 16 x 16-Bit Working Register Array