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PIC24FJ256GU405 - 16-Bit Microcontrollers

Download the PIC24FJ256GU405 datasheet PDF. This datasheet also covers the PIC24FJ512GU410 variant, as both devices belong to the same 16-bit microcontrollers family and are provided as variant models within a single manufacturer datasheet.

Features

  • Up to 24-Channel, Software Selectable 10/12-Bit Analog-to-Digital Converter:.
  • 12-bit, 350K samples/second conversion rate (single Sample-and-Hold).
  • 10-bit, 400K samples/second conversion rate (single Sample-and-Hold).
  • Sleep mode operation.
  • Low-voltage boost for input.
  • Band gap reference input feature.
  • Core-independent windowed threshold compare feature.
  • Auto-scan feature.
  • Three Analog Comparators with Input Multipl.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (PIC24FJ512GU410-Microchip.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

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PIC24FJ256GA110 16-Bit General Purpose Flash Microcontrollers Microchip Technology
PIC24FJ256GB106 16-Bit Flash Microcontrollers Microchip Technology
PIC24FJ256GB108 16-Bit Flash Microcontrollers Microchip Technology

Other Datasheets by Microchip

Part Number Description
PIC24FJ256GU406 16-Bit Microcontrollers
PIC24FJ256GU408 16-Bit Microcontrollers
PIC24FJ256GU410 16-Bit Microcontrollers
PIC24FJ256GA406 16-Bit Flash Microcontrollers
PIC24FJ256GA410 16-Bit Flash Microcontrollers

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
PIC24FJ512GU410 Family Data Sheet 16-Bit eXtreme Low-Power Microcontrollers with LCD Controller and USB High-Performance CPU • Modified Harvard Architecture • 512 Kbytes Flash Memory • 32 Kbytes RAM • Up to 16 MIPS Operation @ 32 MHz • 17-Bit x 17-Bit Single-Cycle Hardware Fractional/Integer Multiplier • 32-Bit by 16-Bit Hardware Divider • 16-Bit x 16-Bit Working Register Array • C Compiler Optimized Instruction Set Architecture • Two Address Generation Units for Separate Read and Write Addressing of Data Memory LCD Display Controller • 64 Segments and 8 Commons Supporting up to 480 Pixels • LCD Charge Pump with 5 µA Low Power • Core-Independent LCD Animation • Operation in Sleep Mode Analog Features • Up to 24-Channel, Software Selectable 10/12-Bit Analog-to-Digital Converter: – 12-bit, 3
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