PIC18F24Q10 Datasheet | Microchip Technology

PIC18F24/25Q10 28-Pin, Low-Power, High-Performance Microcontrollers Description PIC18F24/25Q10 microcontrollers feature Analog, Core Independent, and munication Peripherals for a wide range of general purpose and low-power applications. These 28 -pin devices are equipped with a 10-bit ADC with putation (ADC2) automating Capacitive Voltage Divider (CVD) techniques for advanced touch sensing, averaging, filtering, oversampling and performing automatic threshold parisons. They also offer a set of Core Independent Peripherals such as plementary Waveform Generator (CWG), Windowed Watchdog Timer (WWDT), Cyclic Redundancy Check (CRC)/Memory Scan, Zero-Cross Detect (ZCD), and Peripheral Pin Select (PPS), providing for increased design flexibility and lower system cost. Core Features - C piler Optimized RISC Architecture - Operating Speed: - DC - 64 MHz clock input over the full VDD range - 62.5 ns minimum instruction cycle - Programmable 2-Level Interrupt Priority - 31-Level Deep Hardware Stack - Three 8-Bit Timers (TMR2/4/6) with Hardware Limit Timer (HLT) - Four 16-Bit Timers (TMR0/1/3/5) - Low-Current Power-on Reset (POR) - Power-up Timer (PWRT) - Brown-out Reset (BOR) - Low-Power BOR (LPBOR) Option - Windowed Watchdog Timer (WWDT): - Watchdog Reset on too long or too short interval between watchdog clear events - Variable prescaler selection - Variable window size selection - All sources configurable in hardware or software Memory - Up to 32K Bytes Program Flash Memory - Up to 2048 Bytes Data SRAM Memory - 256 Bytes Data EEPROM - Programmable Code Protection © 2018 Microchip Technology Inc. Datasheet Preliminary...