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NOT RECOMMENDED FOR NEW DESIGNS
SY10EL34/L SY100EL34/L
5V/3.3V ÷2, ÷4, ÷8 Clock Generation Chip Precision Edge®
General Description
The SY10/100EL34/L are low-skew ÷2, ÷4, ÷8 clock generation chips designed explicitly for low-skew clock generation applications. The internal dividers are synchronous to each other; therefore, the common output edges are all precisely aligned. The devices can be driven by either a differential or single-ended ECL or, if positive power supplies are used, PECL input signal. In addition, by using the VBB output, a sinusoidal source can be ACcoupled into the device. If a single-ended input is to be
used, the VBB output should be connected to the CLK input and bypassed to ground via a 0.01µF capacitor.
SY100EL34 Datasheet
