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Micrel Semiconductor

PL500-37 Datasheet Preview

PL500-37 Datasheet

Low Phase Noise VCXO

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(Preliminary )P L 5 0 0 -3 7
Low Phase Noise VCXO (36MHz to 130MHz)
FE AT UR E S
VCXO output for the 36MHz to 130MHz range
Low phase noise (-148 dBc @ 10kHz offset at
77.76MHz).
CMOS output with OE tri-state control.
36 to 130MHz fundamental crystal input.
Integrated high linearity variable capacitors.
8mA drive capability at TTL output.
+/- 150 ppm pull range, max 5% linearity.
Low jitter (RMS): 2.5ps period jitter.
Single 2.5V ±10% or 3.3V ±10 power supply.
Operating temperature range from -40C to +85C
Available in Die or Wafer form or SOP-8L or
SOT23-6L packaging.
PIN AND PAD CONFIGURATION
XIN
OE^
VCON
GND
18
27
36
45
SOP-8L
XOUT
DNC
VDD
CLK
VCON
GND
XIN
1
2
3
6 CLK
5 VDD
4 XOUT
DESCRIPTION
The PL500-37 is a low cost, high performance and
low phase noise VCXO for the 36 to 130MHz range,
providing less than -148dBc at 10kHz offset at
77.76MHz. The very low jitter (2.5 ps RMS period
jitter) makes this chip ideal for applications requiring
voltage controlled frequency sources. The input
crystal frequency can range from 36 to 130MHz
(fundamental resonant mode).
DIE SPECIFICATIONS
Name
Value
Size
Reverse side
Pad dimensions
Thickness
39 x 32 mil
GND
80 micron x 80 micron
8 mil
SOT23-6L
^: Denotes internal Pull-up
1 XIN
32 mil
8
XOUT
2 OE^
3 VCON
4 GND
(812,986)
OE^ 7
VDD 6
CLK 5
Y (0,0)
X
BLOCK DIAGRAM
XIN
XOUT
XTAL
OSC
VARICAP
OE
VCON
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944 -0800 • fax +1(408) 474-1000 • www.micrel.com Rev 7/05/10 Page 1




Micrel Semiconductor

PL500-37 Datasheet Preview

PL500-37 Datasheet

Low Phase Noise VCXO

No Preview Available !

(Preliminary )P L 5 0 0 -3 7
Low Phase Noise VCXO (36MHz to 130MHz)
PIN AND PAD ASSIGNMENT AND DESCRIPTION
Name
Pin#
SOP-8 SOT23-6
Die Pad Position
X (m) Y (m)
Type
XIN 1
3
94.183 768.599
I
2
OE
-
- 94.157 605.029
I
- 715.472 626.716
VCON
GND
CLK
3
4
5
1
94.183 331.756
I
2 94.193 140.379 P
6 715.472 203.866 O
VDD 6
5 715.307 455.726 P
DNC
XOUT
7
8
- - -I
4
476.906 888.881
I
Description
Crystal input pin.
Output Enable input pin. Disables the output
when low. Internal pull-up enables output by
default if pin is not connected to low. Use only
one OE signal.
Frequency control voltage input pin.
Ground pin.
Output clock pin.
VDD power supply pin. Only one VDD pin is
necessary.
Do Not Connect. No Internal Connection.
Crystal output pin.
ELECTRICAL SPECIFICATIONS
1. Absolute Maximum Ratings
PARAMETERS
SYMBOL
MIN.
MAX.
UNITS
Supply Voltage
VDD 4.6 V
Input Voltage, dc
VI
-0.5 VDD+0.5
V
Output Voltage, dc
VO
-0.5 VDD+0.5
V
Storage Temperature
TS -65 150 C
Ambient Operating Temperature*
TA -40 85 C
Junction Temperature
TJ 125 C
Lead Temperature (soldering, 10s)
260 C
ESD Protection, Human Body Model
2 kV
Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended per iods may cause permanent damage to the
device and affect product reliability. These conditions represent a stress rating only, and functional operations of the dev ice at these or any other
conditions above the operational limits noted in this specificatio n is not implied. *Operating temperature is guaranteed by design. Parts are
tested to commercial grade only.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944-0800 • fax +1(408) 474-1000 • www.micrel.com Rev 09/09/05 Page 2


Part Number PL500-37
Description Low Phase Noise VCXO
Maker Micrel Semiconductor
Total Page 6 Pages
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