KSZ8851-32MQL
Description
The KSZ8851M-series is a single-port controller chip with a non-PCI CPU interface and is available in 8/16-bit and 32-bit bus designs.
Key Features
- Integrated MAC and PHY Ethernet Controller fully pliant with IEEE 802.3/802.3u standards
- Designed for high performance and high throughput applications
- Supports 10BASE-T/100BASE-TX
- Supports IEEE 802.3x full-duplex flow control and halfduplex backpressure collision flow control
- Supports DMA-slave burst data read and write transfers
- Supports IP Header (IPv4)/TCP/UDP/ICMP checksum generation and checking
- Supports IPv6 TCP/UDP/ICMP checksum generation and checking
- Automatic 32-bit CRC generation and checking
- Supports multiple data frames for transmit and receive without address bus and byte-enable signals
- Supports both Big- and Little-Endian processors
