900,000+ datasheet pdf search and download

Datasheet4U offers most rated semiconductors data sheet pdf






Micrel

PL585-88 Datasheet Preview

PL585-88 Datasheet

19MHz to 800MHz Low Phase-Noise VCXO

No Preview Available !

(Preliminary) PL585-88
19MHz to 800MHz Low Phase-Noise VCXO
FE AT UR E S
< 0.5ps RMS phase jitter (12kHz to 20MHz)
at 622.08MHz
25ps max peak to peak period jitter
Ultra Low-Power Consumption
< 90mA @622MHz PECL output
<10A at Power Down (PDB) Mode
Input Frequency:
Fundamental Crystal: 19MHz to 40MHz
Output Frequency:
19MHz to 800MHz output.
Output type: LVPECL
High Linearity VCXO: <10% linearity
Pullability: ±150 ppm
Programmable OE input polarity selection.
Power Supply: 3.3V, ±10%
Operating Temperature Ranges:
Commercial: 0C to 70C
Industrial: -40C to 85C
Available in Die or Wafer
DESCRIPTION
The PL585 is a Dual LC core monolithic IC clock,
capable of maintaining sub-picoseconds RMS phase
jitter, while covering a wide frequency output range
up to 800MHz, without the use of external
components. The high performance and high
frequency output is achieved using a low cost
fundamental crystal of between 19MHz and 40 MHz.
The PL585 is designed to address the demanding
requirements of high performance applications such
as Fiber Channel, serial ATA, Ethernet, SAN,
SONET/SDH, etc.
PIN CONFIGURATION
65 mil
VCON/
9
SCLK
8
Die ID
OE/PDB/
SDIO
DNC
10
11
GND_ANA
GND_DIG
GND_BUF
12
13
14
(1650,2250)
7
6 VDD_ANA
5 VDD_DIG
4 VDD_BUF
3 QB
2 VDD_BUF
1Q
(0,0) PL585
DIE SPECIFICATIONS
Name
Size
Reverse side
Pad dimensions
Thickness
Value
65 x 88.6 mil
GND
80 micron x 80 micron
8 mils
OUTPUT ENABLE CONTROL
OE Select
(Programmable)
OE
State
0
0 (Default)
1
Output enabled
Tri-state
1 (Default)
0
1 (Default)
Tri-state
Output enabled
BLOCK DIAGRAM
OE/PDB
XIN/REF
XOUT
VCON
(Default pre-programmed output path)
Xtal
Osc
PD/CP
LF HF
LCVCOs
Varicap
Programmable Function
M Divider
(5 bit)
Pre-scalar
4/6
/2
P Divider
(4 bit)
/2
Q
QB
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944-0800 • fax +1(408) 474-1000 • www.micrel.com Rev 06/24/1 Page 1




Micrel

PL585-88 Datasheet Preview

PL585-88 Datasheet

19MHz to 800MHz Low Phase-Noise VCXO

No Preview Available !

(Preliminary) PL585-88
19MHz to 800MHz Low Phase-Noise VCXO
PAD ASSIGNMENT
Name
Pad # X (m)
Q 1 1551
VDD_BUF
2 1551
QB
VDD_BUF
VDD_DIG
VDD_ANA
XOUT
3 1551
4 1551
5 1551
6 1551
7 1503
XIN 8 630
VCON/SCLK 9 99
OE/PDB/SDIO 10
DNC
GND_ANA
GND_DIG
GND_BUF
11
12
13
14
99
99
99
99
99
Y (m)
220
448
676
1390
1552
1790
2156
2156
2060
1256
970
700
532
364
Description
Output buffer
VDD connection for buffer circuitry
Output buffer
VDD connection for buffer circuitry
VDD connection for digital circuitry
VDD connection for analog circuitry
Output connection to crystal
Crystal input connection
Analog voltage pin for the VCXO. The serial interface uses this
pin for the serial clock input (SCLK), during programming.
This pin may be programmed as output enable (OE), or power-
down (PDB) pin.
The serial interface uses this pin for the serial data input (SDIO)
during programming. This pin incorporates an Internal pull-up
resistor of 60Kfor OE, PDB operations.
Do not connect
GND connection for analog circuitry
GND connection for digital circuitry
GND connection for buffer circuitry
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944-0800 • fax +1(408) 474-1000 • www.micrel.com Rev 06/24/1 Page 2


Part Number PL585-88
Description 19MHz to 800MHz Low Phase-Noise VCXO
Maker Micrel
Total Page 6 Pages
PDF Download

PL585-88 Datasheet PDF

View PDF for Mobile








Similar Datasheet

1 PL585-88 19MHz to 800MHz Low Phase-Noise VCXO
Micrel





Part Number Start With

0    1    2    3    4    5    6    7    8    9    A    B    C    D    E    F    G    H    I    J    K    L    M    N    O    P    Q    R    S    T    U    V    W    X    Y    Z

Site map

Webmaste! click here

Contact us

Buy Components

Privacy Policy