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PL520-20 Datasheet Preview

PL520-20 Datasheet

Low Phase Noise VCXO

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PL520-20
Low Phase Noise VCXO (for 100-200MHz Fundamental Crystals)
FE AT UR E S
100MHz to 200MHz Fundamental Mode Crystals
Output range (no PLL):
100MHz 200MHz (3.3V).
100MHz 170MHz (2.5V).
Low Injection Power for crystal 50uW.
Complementary outputs: CMOS, PECL or LVDS.
Selectable OE Logic (enable high or enable low).
Integrated variable capacitors.
Supports 2.5V or 3.3V-Power Supply.
Available in die form.
Die thickness is 10 mil.
DESCRIPTION
PL520-20 is a VCXO IC specifically designed to pull
high frequency fundamental crystals. Its design was
optimized to tolerate higher limits of inter-electrode
capacitance and bonding capacitance to improve
yield. It achieves very low current into the crystal
resulting in better overall stability. Its internal
varicaps allow on-chip frequency pulling, controlled
by the VCON input.
BLOCK DIAGRAM
VCON Oscillator
Amplifier
X+
w/
integrated
varicaps
X-
OE
Q
Q
PL520-20
DIE CONFIGURATION
65 mil
25 24 23 22 21 20 19 18
XIN 26
XOUT 27
Die ID:
A1919-19B
DNC 28
DNC 29
OE 30
VCON 31
C502A
12345 6 78
(1550,1475)
17 GNDBUF
16 CMOS
15 LVDSB
14 PECLB
13 VDDBUF
12 VDDBUF
11 PECL
10 LVDS
9 OE_SELECT
Y (0,0)
X
DIE SPECIFICATIONS
Name
Size
Reverse side
Pad dimensions
Thickness
Value
62 x 65 mil
GND
80 micron x 80 micron
10 mil
OUTPUT SELECTION AND ENABLE
Pad #18
OUTSEL1
0
0
1
1
Pad #25
OUTSEL0
0
1
0
1
Selected Output
High Drive CMOS
Standard CMOS
L VD S
PECL (default)
OE_SELECT
(Pad #9)
OE
(Pad #30)
State
0
0 Tri-state
1 (Default) Output enabled
1 (Default)
0 (Default) Output enabled
1 Tri-state
Pad #9, 18, 25 : Bond to GND to se t to “0 ”, bond to VD D to se t to “1 ”
No connec tion resul ts to “de fau l t” se tting through in ternal pu ll -up/-do wn.
Pad #30: Logical s ta tes de fined by PECL leve ls i f O E_SELECT (pad #9) is “1 ”
Logical s ta tes de fined by CM OS levels i f O E_SELECT is “0 ”
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944 -0800 • fax +1(408) 474-1000 • www.micrel.com Rev 3/13/07 Page 1




Micrel

PL520-20 Datasheet Preview

PL520-20 Datasheet

Low Phase Noise VCXO

No Preview Available !

PL520-20
Low Phase Noise VCXO (for 100-200MHz Fundamental Crystals)
ELECTRICAL SPECIFICATIONS
1. Absolute Maximum Ratings
PARAMETERS
SYMBOL
MIN.
MAX.
UNITS
Supply Voltage
Input Voltage, dc
Output Voltage, dc
VDD 4.6 V
VI
VSS- 0. 5
VD D+ 0. 5
V
VO
VSS- 0. 5
VD D+ 0. 5
V
Storage Temperature
TS -65 150 C
Ambient Operating Temperature for 3.3V Supplies
TA -40 85 C
Ambient Operating Temperature for 2.5V Supplies
TA -20 70 C
Junction Temperature
TJ 125 C
Lead Temperature (soldering, 10s)
260 C
Input Static Discharge Voltage Protection
2 kV
Exposure of the device under conditions beyond the limits specifie d by Maximum Ratings for extended periods may cause permanent damage to the
device and affect product reliability. These conditions represent a stress rating only, and functional operations of the dev ice at these or any other
conditions above the operational limits noted in this specification is not implied.
2. Crystal Specifications
PARAMETERS
SYMBOL
Crystal Resonator Frequency
F X IN
Crystal Loading Rating
Interelectrode Capacitance
Crystal Pullability
Recommended ESR
CL (x tal)
C0
C0/C1 (xtal)
RE
CONDITIONS
Parallel Fundamental Mode
3.3V Supplies
2.5V Supplies
3.3V Supply
Die at VCON = 1.65V
2.5V Supply
Die at VCON = 1.25V
AT cut
AT cut
3.3V Supplies
2.5V Supplies
MIN. TYP.
100
100
4
5
MAX.
200
170
3.5
250
30
15
UNITS
MHz
pF
pF
pF
-

Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944 -0800 • fax +1(408) 474-1000 • www.micrel.com Rev 3/13/07 Page 2


Part Number PL520-20
Description Low Phase Noise VCXO
Maker Micrel
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