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PL502-30 Datasheet Preview

PL502-30 Datasheet

750kHz - 800MHz Low Phase Noise VCXO

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PL502-30
750kHz 800MHz Low Phase Noise VCXO (for 12 to 25MHz Crystals)
FE AT UR E S
750kHz to 800MHz output range
Low phase noise output
-127dBc/Hz for 155.52MHz @ 10kHz offset
-115dBc/Hz for 622.08MHz @ 10kHz offset
Selectable LVCMOS, LVPECL or LVDS output
Selectable High Drive or Standard Drive LVCMOS
12MHz to 25MHz crystal input
No external load capacitor or varicap required
Output Enable selector
Wide pull range (±200ppm)
3.3V operation
Available in Die form (65 mil x 62 mil)
DIE CONFIGURATION
65 mil
(1550,1475)
25 24 23 22 21 20 19 18 17 GNDBUF
XIN 26
XOUT 27
Die ID:
B3535-43
16 LVCMOS
15 LVDSB
SEL3^ 28
14 LVPECLB
SEL2^ 29
13 VDDBUF
12 VDDBUF
OE_CTRL 30
C502
11 LVPECL
10 LVDS
VCON 31
9 OE_SEL^
12345 6 78
DESCRIPTION
The PL502-30 is a monolithic low jitter and low
phase noise VCXO IC with LVCMOS, LVDS and
LVPECL output capabilities, covering the 750kHz to
800MHz output range. It allows the control of the
output frequency with an input voltage (VCON),
using a low cost 12MHz to 25MHz crystal.
This one IC can be used to produce a VCXO with
output frequencies ranging from FXIN / 16 to FXIN x 32
thanks to the four frequency selector pads. This
makes the PL502-30 ideal as a universal die for
applications ranging from ADSL to SONET.
Y
X
(0,0)
Note: ^ denotes internal pull up
OUTPUT SELECTION AND ENABLE
OUTSEL1 OUTSEL0
(Pad #18) (Pad #25)
Selected Output
0 0 High Drive LVCMOS
0 1 Standard Drive LVCMOS
1 0 LVPECL
1 1 LVDS
DIE SPECIFICATIONS
Name
Value
Size
Reverse side
Pad dimensions
Thickness
62 x 65 mil
GND
80 micron x 80 micron
8 mil
OE_SELECT OE_CTRL
(Pad #9)
(Pad #30)
State
0
0 (Default)
Output enabled
1 Tri-state
1 (Default)
0
1 (Default)
Tri-state
Output enabled
Pad #9: Bond to GND to set to “0”, bond to VDD to set to “1”
Pad #30: Logical states defined by PECL levels if OE_SELECT is “0”
Logical states defined by CMOS levels if OE_SELECT is “1”
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944 -0800 • fax +1(408) 474-1000 • www.micrel.com Rev 5/16/11 Page 1




Micrel

PL502-30 Datasheet Preview

PL502-30 Datasheet

750kHz - 800MHz Low Phase Noise VCXO

No Preview Available !

PL502-30
750kHz 800MHz Low Phase Noise VCXO (for 12 to 25MHz Crystals)
BLOCK DIAGRAM
VCON
Varicap
XIN
XOUT
SEL[3:0]
Xtal Osc
Reference
Divider
VCO
Divider
Phase
Detector
Charge
Pump
+
Loop
Filter
VCO
CLKBAR
CLK
FREQUENCY SELECTION TABLE
SEL3
(Pad #28)
SEL2
(Pad #29)
SEL1
(Pad #19)
SEL0
(Pad #20)
00
0
0
00
0
1
00
1
0
00
1
1
01
0
0
01
0
1
01
1
0
01
1
1
10
0
0
10
0
1
10
1
0
10
1
1
11
0
0
11
0
1
11
1
0
11
1
1
All pads have internal pull-ups (default value is 1). Bond to GND to set to 0.
OE
Selected Multiplier
Reserved
Reserved
Reserved
Fin x 32
Reserved
Reserved
Fin / 8
Fin x 2
Reserved
Fin / 2
Fin / 16
Fin x 4
Fin / 4
Fin x 8
Fin x 16
No multiplication
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944 -0800 • fax +1(408) 474-1000 • www.micrel.com Rev 5/16/11 Page 2


Part Number PL502-30
Description 750kHz - 800MHz Low Phase Noise VCXO
Maker Micrel
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PL502-30 Datasheet PDF






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