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19-4910; Rev 0; 10/09
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Low-Jitter, Wide Frequency Range, Programmable Clock Generator with 10 Outputs
General Description
The MAX3638 is a highly flexible, precision phaselocked loop (PLL) clock generator optimized for the next generation of network equipment that demands low-jitter clock generation and distribution for robust high-speed data transmission. The device features subpicosecond jitter generation, excellent power-supply noise rejection, and pin-programmable LVDS/LVPECL output interfaces. The MAX3638 provides nine differential outputs and one LVCMOS output, divided into three banks.
MAX3638 Datasheet
