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DS2460 - SHA-1 Coprocessor

Datasheet Summary

Description

The DS2460 SHA-1 Coprocessor with EEPROM is a hardware implementation of the ISO/IEC 10118-3 Secure Hash Algorithm (SHA-1), eliminating the need to develop software to perform the complex SHA computation required for authenticating SHA devices and for performing the validation of digitally signed se

Features

  • Dedicated Hardware-Accelerated SHA Engine for Generating SHA-1 MACs.
  • 112 Bytes User EEPROM for Storing End Equipment Property Data.
  • I²C Host Interface, Supports 100kHz and 400kHz Communication Speeds.
  • Three Address Inputs for I²C Address Assignment.
  • Single-Byte to 8-Byte EEPROM Write Sequences.
  • 64-Bit Unique Registration Number.
  • EEPROM Endurance: 200k Cycles per 8-Byte Block at 25°C.
  • 10ms max EEPROM Write Cycle.
  • Wide Operating Range: 2.7V to 5.5V, -4.

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Datasheet preview – DS2460

Datasheet Details

Part number DS2460
Manufacturer Maxim Integrated
File Size 232.10 KB
Description SHA-1 Coprocessor
Datasheet download datasheet DS2460 Datasheet
Additional preview pages of the DS2460 datasheet.

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Full PDF Text Transcription

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3/10 Abridged Data Sheet DS2460 SHA-1 Coprocessor with EEPROM www.maxim-ic.com GENERAL DESCRIPTION The DS2460 SHA-1 Coprocessor with EEPROM is a hardware implementation of the ISO/IEC 10118-3 Secure Hash Algorithm (SHA-1), eliminating the need to develop software to perform the complex SHA computation required for authenticating SHA devices and for performing the validation of digitally signed service data. The DS2460 communicates with a microcontroller through the popular I²C interface. Applications include hosts of access control and electronic payment systems for token authentication and service data validation as well as generation of one-time-use encryption keys for short message encryption and decryption for messages not exceeding the length of a SHA-1 result, which is 20 bytes.
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