* RDS(ON)≦200mΩ@VGS=10V
* RDS(ON)≦260mΩ@VGS=4.5V
* Super high density cell design for extremely low RDS(ON)
* Exceptional on-resistance and maximum DC cur.

* Power Management in Note book
* DC/DC Converter
* Load Switch
* LCD Display inverter PIN CONFIGURATIO.

The ME25N06 is the N-Channel logic enhancement mode power field effect transistors are produced using high cell density, DMOS trench technology. This high density process is especially tailored to minimize on-state resistance. These devices are parti.

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