ispClock5400D
Description
The ispClock5400D family integrates a CleanClock PLL and a FlexiClock Output block.
Key Features
- CleanClock™ PLL
- Ultra Low Period Jitter 2.5ps
- Ultra Low Phase Jitter 6.5ps
- Fully Integrated High-Performance PLL
- Up to 10 Programmable Fan-out Buffers
- Programmable differential output standards and individual enable controls - LVDS, LVPECL, HSTL, SSTL, HCSL, MLVDS
- Up to 10 banks with individual VCCO and GND - 1.5V, 1.8V, 2.5V, 3.3V
- All I/Os are Hot Socket pliant
- Operating Modes
- Fan-out buffer with programmable output skew control
