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PALCE22V10 Datasheet 24-Pin EE CMOS (Zero Power) Versatile PAL Device

Manufacturer: Lattice Semiconductor

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Datasheet Details

Part number PALCE22V10
Manufacturer Lattice Semiconductor
File Size 691.86 KB
Description 24-Pin EE CMOS (Zero Power) Versatile PAL Device
Datasheet download datasheet PALCE22V10 Datasheet

General Description

The PALCE22V10 provides user-programmable logic for replacing conventional SSI/MSI gates and flip-flops at a reduced chip count.

The PALCE22V10Z is an advanced PAL® device built with zero-power, high-speed, electricallyerasable CMOS technology.

It provides user-programmable logic for replacing conventional zeropower CMOS SSI/MSI gates and flip-flops at a reduced chip count.

Overview

PALCE22V10 COM'L: H-5/7/10/15/25,Q-10/15/25 IND: H-10/15/20/25 PALCE22V10Z COM'L: -25 IND: -15/25 PALCE22V10 and PALCE22V10Z Families 24-Pin EE CMOS (Zero Power) Versatile PAL Device DISTINCTIVE CHARACTERISTICS x As fast as 5-ns propagation delay and 142.8 MHz fMAX (external) x Low-power EE CMOS x 10 macrocells programmable as registered or combinatorial, and active high or active low to match application needs x Varied product term distribution allows up to 16 product terms per output for complex x x x x x x functions Peripheral Component Interconnect (PCI) compliant (-5/-7/-10) Global asynchronous reset and synchronous preset for initialization Power-up reset for initialization and register preload for testability Extensive third-party software and programmer support 24-pin SKINNY DIP, 24-pin SOIC, and 28-pin PLCC 5-ns and 7.

Key Features

  • of the PALCE22V10. In addition, the PALCE22V10Z has zero standby power and unused product term disable. Product terms with all connections opened assume the logical HIGH state; product terms connected to both true and complement of any single input assume the logical LOW state. The PALCE22V10 has 12 inputs and 10 I/O macrocells. The macrocell (Figure 1) allows one of four potential output configurations registered output or combinatorial I/O, active high or active low (see Figure 1). The configura.

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