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ispXPLD 5000MX Family
3.3V, 2.5V and 1.8V In-System Programmable eXpanded Programmable Logic Device XPLD™ Family
August 2004 Data Sheet
TM
Features
■ Flexible Multi-Function Block (MFB) Architecture
• • • • • SuperWIDE™ logic (up to 136 inputs) Arithmetic capability Single- or Dual-port SRAM FIFO Ternary CAM
■ Expanded In-System Programmability (ispXP™)
• Instant-on capability • Single chip convenience • In-System Programmable via IEEE 1532 Interface • Infinitely reconfigurable via IEEE 1532 or sysCONFIG™ microprocessor interface • Design security
■ sysCLOCK™ PLL Timing Control
• Multiply and divide between 1 and 32 • Clock shifting capability • External feedback capability
■ High Speed Operation
• 4.
LC5256MC Datasheet
