ISPCLOCK5510
Overview
- Four Operating Configurations * * *
- Zero delay buffer Zero delay and non-zero delay buffer Dual non-zero delay buffer Non-zero delay buffer with output divider
- Up to +/- 5ns skew range
- Coarse and fine adjustment modes
- Up to Three Clock Frequency Domains
- Flexible Clock Reference and External Feedback Inputs
- Programmable single-ended or differential input reference standards - LVTTL, LVCMOS, SSTL, HSTL, LVDS, LVPECL, Differential HSTL, Differential SSTL
- Clock A/B selection multiplexer
- Programmable Feedback Standards - LVTTL, LVCMOS, SSTL, HSTL
- Programmable termination
