Software compatible with 16450 and 16550 UARTs Configuration capability Separate configurable BAUD clock line Two modes of operation: UART mode and FIFO mode Majority Voting Logic In the FIFO mode transmitter and receiver are each buffered with 16 byte FIFO to reduce the number of interrupts presented to the CPU Adds or deletes standard asynchronous communication bits (start, stop, and parity) to or from the serial data In UART mode receiver and transmitter ar.
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D16550
Configurable UART with FIFO ver 2.11
OVERVIEW
The D16550 is a soft Core of a Universal Asynchronous Receiver/Transmitter (UART) functionally identical to the TL16C550A. The D16550 allows serial transmission in two modes: UART mode and FIFO mode. In FIFO mode internal FIFOs are activated allowing 16 bytes (plus 3 bits of error data per byte in the RCVR FIFO) to be stored in both receive and transmit directions. D16550 performs serial-toparallel conversion on data characters received from a peripheral device or a MODEM, and parallel-to-serial conversion on data characters received from the CPU. The CPU can read the complete status of the UART at any time during the functional operation.
D16550 Datasheet
