RED3000
RED3000 is AC LINE FREQUENCY DIVIDERS manufactured by LSI Computer Systems.
FEATURES
:
- Clock input pulse shaper accepts 50Hz/60Hz sine wave directly
- Fully static counter operation
- +4.5V to +15V operation (VDD
- VSS)
- Low power dissipation
- High noise immunity
- Reset
- Input Enable
- 50Hz/60Hz division select input
- Output low power TTL patible at +4.5V operation
- Square Wave Output (except for ÷ 5)
- RED x/y (DIP); RED x/y-S (SOIC) See Figure 1 APPLICATION: Time base generator from either 50Hz or 60Hz line frequency to produce: 10 pulses per second 1 pulse per second 1 pulse per 2 seconds 1 pulse per .1 minute 1 pulse per 10 seconds 1 pulse per minute (RED 5/6) (RED 50/60) (RED 100/120) (RED 300/360) (RED 500/600) (RED 3000/3600)
PIN ASSIGNMENT
- TOP VIEW
OUTPUT
V DD (V+)
RESET
DIVISION SELECT
V SS (-V)
ENABLE
CLOCK INPUT
FIGURE 1
MARKING AS FOLLOWS: PART MARKING RED 5/6 RED 50/60 RED 100/120 RED 300/360 RED 500/600 RED 3000/3600 RED 6 RED 60 RED 120 RED 360 RED 600 RED 3600
DESCRIPTION
OF OPERATION: The counter advances by one on each negative transition of the input clock pulse as long as the Enable signal is High and the Reset signal is Low. When the Enable signal is Low the input clock pulses will be inhibited and the counter will be held at the state it was in prior to bringing the Enable Low. A High Reset signal clears the counter to zero count. Depending on the device used, a Low on the Division Select input will cause a Divide by 6, 60, 120, 360, 600 or 3600. A High on the Division Select will cause a Divide by 5, 50, 100, 300, 500 or 3000. All outputs are 50% duty cycle except RED 5, where output is low for two clocks and high for three clocks. CLOCK INPUT If input signals are less than the Vss or greater than VDD, a series input resistor should be used to limit the maximum input current to 2 m A.
MAXIMUM RATINGS: PARAMETER SYMBOL VALUE UNIT Storage Temperature TSTG -65 to +150 ˚C Operating Temperature TA -40 to +85 ˚C DC Supply Voltage (VDD-Vss) +18 V Voltage at any input VIN...