LS7056 Datasheet | LSI

LSI/CSI ® LS7055 LS7056 (631) 271-0400 FAX (631) 271-0405 January 2003 LSI puter Systems, Inc. 1235 Walt Whitman Road, Melville, NY 11747 A3800 6 DECADE PREDETERMINING UP/DOWN COUNTER Features : - +4.75V to +15V (Vss - VDD) - Preset, Presignal and Mainsignal Store - DC to 250k Hz Count Frequency - Fully Synchronous Operation Three parators with Output Flags Automatic or Manual Preset/Reset Control - Thumbwheel Interface for Storage Selects - Prescale on Count Input Selectable - Count Inhibit - Up/Down Control - Scan Rate up to 150k Hz - Scan Oscillator has Override Capability - Blanking Override for Decimal Point Operaton - Multiplexed 7 Segment and BCD Data Output - Output latches - Reset - Hysteresis on Count Input - CMOS Type Noise Immunity on all other inputs - LS7055, LS7056 (DIP) - See Figure 1 DESCRIPTION: The LS7055/LS7056 is a MOS synchronous 6 decade Up/Down counter. The circuit includes storages and parators, zero detect, automatic presetting and resetting, output latches, multiplexed output BCD and seven segment data. Thumbwheel switches can be used to provide BCD data to the storage networks in the circuit. COUNT (Pin 40) Counter operates at speeds up to 250k Hz and advances on the positive edge of the input count pulse. UP/DOWN (Pin 39) Counter operates in up or down mode. A high input causes the counter to operate in the up mode while a low input causes it to operate in the down mode. COUNT INHIBIT (Pin 1) A high input inhibits counting and the counter remains at its last count. A low input enables counting. DATA TRANSFER INPUT (Pin 37) A high input allows the seven segment display and BCD data to follow the count (the internal latches bee transparent). A low input prevents updating of the latches as the count advances and the seven segment display and BCD data outputs remain fixed. RESET (Pin 4) A high input resets and holds all counter stages at zero. A low input allows counter operation. PIN ASSIGNMENT - TOP VIEW COUNT INHIBIT...