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MR45V200B - FeRAM

Description

The MR45V200B is a nonvolatile 262,144-word x 8-bit ferroelectric random access memory (FeRAM) developed in the ferroelectric process and silicon-gate CMOS technology.

The MR45V200B is accessed using Serial Peripheral Interface.

Features

  • 262,144-word  8-bit configuration (Serial Periphera.

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Datasheet Details

Part number MR45V200B
Manufacturer LAPIS
File Size 502.46 KB
Description FeRAM
Datasheet download datasheet MR45V200B Datasheet

Full PDF Text Transcription

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MR45V200B FEDR45V200B-02 Issue Date: Oct. 2, 2018 2M(262,144-Word  8-Bit) FeRAM (Ferroelectric Random Access Memory) SPI GENERAL DESCRIPTION The MR45V200B is a nonvolatile 262,144-word x 8-bit ferroelectric random access memory (FeRAM) developed in the ferroelectric process and silicon-gate CMOS technology. The MR45V200B is accessed using Serial Peripheral Interface. Unlike SRAMs, this device, whose cells are nonvolatile, eliminates battery backup required to hold data. This device has no mechanisms of erasing and programming memory cells and blocks, such as those used for various EEPROMs. Therefore, the write cycle time can be equal to the read cycle time and the power consumption during a write can be reduced significantly.
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