where module failure could result in physical harm or loss of life, and Kyocera expressly disclaims any and all liabilit.

VDD 0ms MIN 0ms MIN Input signal VCONT 0ms MIN 0ms MIN DISP AN1 (Anode) CA1 (Cathode) AN2 (Anode) CA2 (Cathode) ＩＦ（mＡ） 2.0 10 0.8 ＶＢＲＴ（Ｖ） 2.8 Revision Date Prepared Checked Record Confirmed by: QA Dept. Checked Approved Designed by: .

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