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HI5728 - A/D Converter

General Description

PIN NO.

39-30 1-6, 48-46 8 15 23 22 14, 24 13, 18, 19, 25 17 16 20 21 11, 27 12, 26 10, 28, 41, 44 9, 29, 40, 45 43 42 PIN NAME PIN DESCRIPTION QD9 (MSB) Through Digital Data Bit 9, the Most Significant Bit through Digital Data Bit 0, the Least Significant Bit, of the Q QD0 (LSB) channel.

Key Features

  • Throughput Rate.
  • . . . .125MSPS.
  • Low Power.
  • 330mW at 5V, 54mW at 3V.
  • Integral Linearity Error.
  • . ±1 LSB.
  • Differential Linearity.
  • . . ±0.5 LSB.
  • Gain Matching (Typ).
  • .0.5%.
  • SFDR at 5MHz Output.
  • . . .68dBc.
  • Single Power Supply fr.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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HI5728 Data Sheet July 1999 File Number 4321.4 10-Bit, 125/60MSPS, Dual High Speed CMOS D/A Converter The HI5728 is a 10-bit, dual 125MSPS D/A converter which is implemented in an advanced CMOS process. It is designed for high speed applications where integration, bandwidth and accuracy are essential. Operating from a single +5V or +3V supply, the converter provides 20.48mA of full scale output current and includes an input data register. Low glitch energy and excellent frequency domain performance are achieved using a segmented architecture. A 60MSPS version and an 8-bit (HI5628) version are also available. Comparable single DAC solutions are the HI5760 (10-bit) and the HI5660 (8-bit). This DAC is a member of the CommLink™ family of communication devices. Features • Throughput Rate . .