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Intersil Electronic Components Datasheet

CDP1852C Datasheet

Byte-Wide Input/Output Port

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TM CDP1852,
CDP1852C
March 1997
Byte-Wide Input/Output Port
Features
• Static Silicon-Gate CMOS Circuitry
• Parallel 8-Bit Data Register and Buffer
• Handshaking Via Service Request Flip-Flop
• Low Quiescent and Operating Power
• Interfaces Directly with CDP1800-Series
Microprocessors
• Single Voltage Supply
• Full Military Temperature Range (-55oC to +125oC)
Ordering Information
PACKAGE
PDIP
SBDIP
TEMP. RANGE
5V
10V
-40oC to +85oC CDP1852CE CDP1852E
-40oC to +85oC CDP1852CD CDP1852D
PKG.
NO.
E24.6
D24.6
Description
The CDP1852 and CDP1852C are parallel, 8-bit, mode-pro-
grammable input/output ports. They are compatible and will
interface directly with CDP1800-series microprocessors. They
are also useful as 8-bit address latches when used with the
CDP1800 multiplexed address bus and as I/O ports in general-
purpose applications.
The mode control is used to program the device as an input port
(mode = 0) or as an output port (mode = 1). The SR/SR output
can be used as a signal to indicate when data is ready to be
transferred. In the input mode, a peripheral device can strobe
data into the CDP1852, and microprocessor can read that data
by device selection. In the output mode, a microprocessor
strobes data into the CDP1852, and handshaking is established
with a peripheral device when the CDP1852 is deselected.
In the input mode, data at the data-in terminals (DI0-DI7) is
strobed into the port’s 8-bit register by a high (1) level on the
clock line. The negative high-to-low transition of the clock
latches the data in the register and sets the service request out-
put low (SR/SR = 0). When CS1/CS1 and CS2 are high
(CS1/CS1 and CS2 = 1), the three-state output drivers are
enabled and data in the 8-bit register appear at the data-out ter-
minals (D00-D07). When either CS1/CS1 or CS2 goes low
(CS1/CS1 or CS2 = 0), the data-out terminals are three-stated
and the service request output returns high (SR/SR =1).
In the output mode, the output drivers are enabled at all times.
Data at the data-in terminals (DI0-DI7) is strobed into the 8-bit
register when CS1/CS1 is low (CS1/CS1 = 0) and CS2 and the
clock are high (1), and are present at the data-out terminals
(D00-D07). The negative high-to-low transition of the clock
latches the data in the register. The SR/SR output goes high
(SR/SR = 1) when the device is deselected (CS1/CS1 = 1 or
CS2 = 0) and returns low (SR/SR = 0) on the following trailing
edge of the clock.
Pinout
24 LEAD DIP
TOP VIEW
Typical CDP1802 Microprocessor System
CSI/CSI 1
MODE 2
DI0 3
DO0 4
DI1 5
DO1 6
DI2 7
DO2 8
DI3 9
DO3 10
CLOCK 11
VSS 12
24 VDD
23 SR/SR
22 DI7
21 DO7
20 DI6
19 DO6
18 DI5
17 DO5
16 DI4
15 DO4
14 CLEAR
13 CS2
ROM
ADDR BUS
TPA
MRD
CEO
RAM
ADDR BUS
TPA
CPU
CDP1802
MRD
MWR
N0 - N2 MRD
TPB
Q
SC0 SC1
INTERRUPT
I/O
CDP1852
DMA - IN DMA - OUT
EF1 - EF4
DATA
CONTROL
BIDIRECTIONAL DATA BUS
FIGURE 1.
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2002. All Rights Reserved
1
File Number 1166.2


Intersil Electronic Components Datasheet

CDP1852C Datasheet

Byte-Wide Input/Output Port

No Preview Available !

CDP1852, CDP1852C
Absolute Maximum Ratings
DC Supply-voltage Range, (VDD)
(Voltage Referenced to VSS Terminal)
CDP1852 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 to +11V
CDP1852C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.5 to +7V
Input Voltage Range, All Inputs . . . . . . . . . . . . . . -0.5 to VDD +0.5V
DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . . ±10mA
Device Dissipation Per Output Transistor. . . . . . . . . . . . . . . 100mW
For TA = Full Package-Temperature Range
(All Package Type)
Thermal Information
Thermal Resistance (Typical)
θJA (oC/W) θJC (oC/W)
PDIP Package . . . . . . . . . . . . . . . . . . .
65
N/A
SBDIP Package. . . . . . . . . . . . . . . . . .
65
20
Operating-Temperature Range (TA)
Package Type D, H . . . . . . . . . . . . . . . . . . . . . . . -55oC to +125oC
Package Type E . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to +85oC
Storage Temperature Range (TSTG) . . . . . . . . . . . . -65oC to +150oC
Lead Temperature (During Soldering): . . . . . . . . . . . . . . . . . +265oC
At Distance 1/16 ± 1/32 inch (1.59 ± 0.79mm)
from Case for 10s max
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Operating Conditions At TA = Full Package Temperature Range. For Maximum Reliability, Operating Conditions Should be
Selected so that Operation is Always within the Following Ranges:
LIMITS
CDP1852
CDP1852C
PARAMETER
DC Operating Voltage Range
MIN
MAX
MIN
MAX
UNITS
4 10.5 4 6.5 V
Input Voltage Range
VSS
VDD
VSS
VDD
V
Functional Diagram
CSI/CSI
(NOTE 1)
CS2
MODE
CLOCK
CLEAR
1
DEVICE
SELECT
13 DECODE
2
11
14
23
SR/SR
CONTROL
(NOTE 1)
LOGIC
24
12
VDD
VSS
MODE 0
P1 CSI
P23 SR
MODE 1
CSI
SR
DI0
DI1
DI2
DI3
DI4
DI5
DI6
DI7
3 RESET CLOCK
5
7
9 8-BIT
16 DATA
18 REGISTER
20
22
ENABLE
THREE-
STATE
OUTPUT
DRIVERS
NOTE:
1. Polarity depends on mode.
FIGURE 2. FUNCTIONAL BLOCK DIAGRAM FOR CDP1852
A CLEAR control is provided for resetting the port’s register
(DO0-DO7 = 0) and service request flip-flop (input mode:
SR/ SR = 1 and output mode: SR/SR = 0).
The CDP1852 is functionally identical to the CDP1852C.
The CDP1852 has a recommended operating voltage range
of 4 to 10.5 volts, and the CDP1852C has a recommended
operating voltage range of 4 to 6.5 volts.
The CDP1852 and CDP1852C are supplied in 24-lead,
hermetic, dual-in-line ceramic packages (D suffix), in 24-lead
dual-in-line plastic packages (E suffix). The CDP1852C is
also available in chip form (H suffix).
4 DO0
6 DO1
8 DO2
10 DO3
15 DO4
17 DO5
19 DO6
21 DO7
2


Part Number CDP1852C
Description Byte-Wide Input/Output Port
Maker Intersil Corporation
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CDP1852C Datasheet PDF






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