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Intersil Electronic Components Datasheet

CDP1824 Datasheet

32-Word x 8-Bit Static RAM

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CDP1824,
CDP1824C
March 1997
32-Word x 8-Bit Static RAM
Features
Description
• Fast Access Time
- VDD = 5V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 710ns
- VDD = 10V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 320ns
• No Precharge or Clock Required
The CDP1824 and CDP1824C are 32-word x 8-bit fully static
CMOS random-access memories for use in CDP-1800
series microprocessor systems. These parts are compatible
with the CDP1802 microprocessor and will interface directly
without additional components.
The CDP1824 is fully decoded and does not require a pre-
charge or clocking signal for proper operation. It has
common input and output and is operated from a single
voltage supply. The MRD signal (output disable control)
enables the three-state output drivers, and overrides the
MWR signal. A CS input is provided for memory expansion.
The CDP1824C is functionally identical to the CDP1824.
The CDP1824 has an operating range of 4V to 10.5V, and
the CDP1824C has an operating voltage range of 4V to
6.5V. The CDP1824 and CDP1824C are supplied in 18 lead
hermetic dual-in-line ceramic packages (D suffix), and in 18
lead dual-in-line plastic packages (E suffix).
Ordering Information
5V
CDP1824CE
CDP1824CEX
CDP1824CD
10V
CDP1824E
CDP1824EX
CDP1824D
Pinout
CDP1824, CDP1824C (PDIP, SBDIP)
TOP VIEW
MA4 1
MA3 2
MA2 3
MA1 4
MA0 5
BUS 7 6
BUS 6 7
BUS 5 8
VSS 9
18 VDD
17 MWR
16 MRD
15 CS
14 BUS 0
13 BUS 1
12 BUS 2
11 BUS 3
10 BUS 4
PACKAGE
PDIP
Burn-In
SBDIP
TEMPERATURE RANGE
-40oC to +85oC
-40oC to +85oC
PKG. NO.
E18.3
E18.3
D18.3
OPERATIONAL MODES
FUNCTION CS MRD MWR DATA PINS STATUS
READ
0 0 X Output: High/Low Dependent
on Data
WRITE
0 1 0 Input: Output Disabled
Not
Selected
1 X X Output Disabled:
High-Impedance State
Standby
0 1 1 Output Disabled:
High-Impedance State
Logic 1 = High Logic 0 = Low X = Don’t Care
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
6-37
File Number 1103.2


Intersil Electronic Components Datasheet

CDP1824 Datasheet

32-Word x 8-Bit Static RAM

No Preview Available !

CDP1824, CDP1824C
Absolute Maximum Ratings
DC Supply Voltage Range, (VDD)
(All Voltages Referenced to VSS Terminal)
CDP1824 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +11V
CDP1824C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7V
Input Voltage Range, All Inputs . . . . . . . . . . . . . -0.5V to VDD +0.5V
DC Input Current, Any One Input. . . . . . . . . . . . . . . . . . . . . . . . .±10mA
Operating Temperature Range
Package Type D . . . . . . . . .
(TA)
....
.
.
.
.
.
.
.
.
.
.
.
.
-55oC
to
+125oC
Package Type E . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to +85oC
Thermal Information
Thermal Resistance (Typical)
θJA (oC/W) θJC (oC/W)
SBDIP Package . . . . . . . . . . . . . . . . . .
75
20
PDIP Package . . . . . . . . . . . . . . . . . . .
75
N/A
Storage Temperature Range (TSTG). . . . . . . . . . . .-65oC to +150oC
Lead Temperature (During Soldering)
At distance 1/16 ±1/32 In. (1.59 ± 0.79mm)
from case for 10s max . . . . . . . . . . . . . . . . . . . . . . . . . . . . +265oC
Recommended Operating Conditions At TA = Full Package Temperature Range.For maximum reliability, operating conditions
should be selected so that operation is always within the following ranges:
CONDITION
LIMITS
CDP1824D
CDP1824CD
PARAMETER
Supply Voltage Range
VDD (V)
-
MIN
MAX
MIN
MAX
UNITS
4 10.5 4 6.5 V
Recommended Input Voltage Range
Input Signal Rise or Fall Time (Note 1)
-
VSS
VDD
VSS
VDD
V
5 - 5 - 5 µs
tR, tF
10 - 2 - - µs
NOTE:
1. Input signal rise or fall times longer than these maxima can cause loss of stored data in either the selected or deselected mode.
Static Electrical Specifications At TA = -40oC to +85oC, Except as Noted:
CONDITIONS
CDP1824
PARAMETER
SYMBOL
VO
(V)
VIN VDD
(NOTE 1)
(V) (V) MIN TYP
Quiescent Device
Current
IDD -
-
-5-
- 10 -
25
250
Output Low (Sink)
Current
IOL
0.4 0, 5
5
1.8
2.2
0.5 0, 10 10
3.6
4.5
Output High (Source)
Current
IOH
4.6 0, 5
5
9.5 0, 10 10
-0.9
-1.8
-1.1
-2.2
Output Voltage
Low-Level
VOL - 0, 5 5 -
-
0, 10
10
-
0
0
Output Voltage
High-Level
VOH
- 0, 5 5 4.9
5
-
0, 10
10
9.9
10
Input Low Voltage
VIL 0.5, 4.5 - 5 -
1.9 - 10 -
-
-
Input High Voltage
VIH 0.5, 9.5
1.9
-
-
5 3.5
10 7
-
-
Input Leakage Current
IIN
Any 0, 5
5
- ± 0.1
Input
0, 10
10
-
± 0.1
Operating Current
(Note 2)
IDD1
- 0, 5 5
-
0, 10
10
-
-
4
8
LIMITS
CDP1824C
MAX
(NOTE 1)
MIN TYP MAX
50 -
100 200
500 -
--
- 1.8 2.2
-
--
--
- -0.9 -1.1
-
--
--
0.1 -
0 0.1
0.1 -
--
- 4.9
5
-
--
--
1.5 -
- 1.5
3-
--
- 3.5
-
-
--
--
±1
-
± 0.1
±1
±1 -
--
8-
48
16 -
--
UNITS
µA
µA
mA
mA
mA
mA
V
V
V
V
V
V
V
V
µA
µA
mA
mA
6-38


Part Number CDP1824
Description 32-Word x 8-Bit Static RAM
Maker Intersil Corporation
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CDP1824 Datasheet PDF






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