1024-Word x 1-Bit Static RAM
• Static CMOS Silicon-On-Sapphire Circuitry CD4000-
• Compatible with CDP1800-Series Microprocessors at
• Fast Access Time. . . . . . . . . . . 100ns Typ. at VDD = 5V
• Single Voltage Supply
• No Precharge or External Clocks Required
• Low Quiescent and Operating Power
• Separate Data Inputs and Outputs
• High Noise Immunity . . . . . . . . . . . . . . . . . . 30% of VDD
• Memory Retention for Standby Battery Voltage Down
to 2V at +25oC
• Latch-Up-Free Transient-Radiation Tolerance
The CDP1821C/3 is a 1024-word x 1-bit CMOS silicon-on-sap-
phire (SOS), fully static, random-access memory designed for
use in CDP1800 microprocessor systems. This device has a
recommended operating voltage range of 4V to 6.5V.
The output state of the CDP1821C/3 is a function of the
input address and chip-select states only. Valid data will
appear at the output in one access time following the latest
address change to a selected chip. After valid data appears,
the address may be changed immediately. It is not neces-
sary to clock the chip-select input or any other input terminal
for fully static operation; therefore the chip-select input may
be used as an additional address input. When the device is
in an unselected state (CS = 1), the internal write circuitry
and output sense ampliﬁer are disabled. This feature allows
the three-state data outputs from many arrays to be OR-tied
to a common bus for easy memory expansion.
-55oC to +125oC
NUMBER PKG. NO.
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
File Number 2983.1