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CDP1821C - High-Reliability CMOS 1024-Word x 1-Bit Static RAM

Description

The CDP1821C/3 is a 1024-word x 1-bit CMOS silicon-on-sapphire (SOS), fully static, random-access memory designed for use in CDP1800 microprocessor systems.

This device has a recommended operating voltage range of 4V to 6.5V.

Features

  • Static CMOS Silicon-On-Sapphire Circuitry CD4000Series Compatible.
  • Compatible with CDP1800-Series Microprocessors at Maximum Speed.
  • Fast Access Time.
  • . 100ns Typ. at VDD = 5V.
  • Single Voltage Supply.
  • No Precharge or External Clocks Required.
  • Low Quiescent and Operating Power.
  • Separate Data Inputs and Outputs.
  • High Noise Immunity.
  • . . . 30% of VDD.
  • Memory Retention for Standb.

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Other Datasheets by Intersil (Renesas)

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CDP1821C3 High-Reliability CMOS 1024-Word x 1-Bit Static RAM
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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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CDP1821C/3 March 1997 High-Reliability CMOS 1024-Word x 1-Bit Static RAM Description The CDP1821C/3 is a 1024-word x 1-bit CMOS silicon-on-sapphire (SOS), fully static, random-access memory designed for use in CDP1800 microprocessor systems. This device has a recommended operating voltage range of 4V to 6.5V. The output state of the CDP1821C/3 is a function of the input address and chip-select states only. Valid data will appear at the output in one access time following the latest address change to a selected chip. After valid data appears, the address may be changed immediately. It is not necessary to clock the chip-select input or any other input terminal for fully static operation; therefore the chip-select input may be used as an additional address input.
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