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CDP1802AC3 Datasheet

High-Reliability CMOS 8-Bit Microprocessor

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DATASHEET
CDP1802AC/3
High-Reliability CMOS 8-Bit Microprocessor
FN1441
Rev 3.00
October 17, 2008
The CDP1802A/3 High-Reliability LSI CMOS 8-bit register
oriented Central-Processing Unit (CPU) is designed for use
as a general purpose computing or control element in a wide
range of stored-program systems or products.
The CDP1802A/3 includes all of the circuits required for
fetching, interpreting, and executing instructions which have
been stored in standard types of memories. Extensive
input/output (I/O) control features are also provided to
facilitate system design.
The 1800 Series Architecture is designed with emphasis on
the total microcomputer system as an integral entity so that
systems having maximum flexibility and minimum cost can be
realized. The 1800 Series CPU also provides a synchronous
interface to memories and external controllers for I/O devices,
and minimizes the cost of interface controllers. Further, the I/O
interface is capable of supporting devices operating in polled,
interrupt-driven, or direct memory-access modes.
The CDP1802AC/3 is functionally identical to its
predecessor, the CDP1802. The “A” version includes some
performance enhancements and can be used as a direct
replacement in systems using the CDP1802.
This type is supplied in a 40 Ld dual-in-line sidebrazed
ceramic package (D suffix).
Features
For Use In Aerospace, Military, and Critical Industrial
Equipment
• Minimum Instruction Fetch-Execute Time of 4.5µs
(Maximum Clock Frequency of 3.6MHz) at VDD = 5V,
TA = +25°C
• Operation Over the Full Military
Temperature Range . . . . . . . . . . . . . . . -55°C to +125°C
• Any Combination of Standard RAM and ROM Up to
65,536 Bytes
• 8-Bit Parallel Organization With Bi-directional Data
Bus and Multiplexed Address Bus
• 16x16 Matrix of Registers for Use as Multiple Program
Counters, Data Pointers, or Data Registers
• On-Chip DMA, Interrupt, and Flag Inputs
• High Noise Immunity . . . . . . . . . . . . . . . . . . 30% of VDD
• Pb-Free (RoHS compliant)
Ordering Information
PART
NUMBER
PART
MARKING
TEMP. RANGE
(°C)
CLOCK FREQUENCY
AT 5V
PACKAGE
PKG
DWG. #
CDP1802ACD3
CDP1802ACD3
-55 to +125
Up to 3.2MHz
40 Ld SBDIP
D40.6
NOTE: These Intersil Pb-free Hermetic packaged products employ 100% Au plate - e4 termination finish, which is RoHS compliant and compatible
with both SnPb and Pb-free soldering operations.
FN1441 Rev 3.00
October 17, 2008
Page 1 of 27


Intersil Electronic Components Datasheet

CDP1802AC3 Datasheet

High-Reliability CMOS 8-Bit Microprocessor

No Preview Available !

CDP1802AC/3
Pinout
CDP1802AC/3
(40 LD SBDIP)
TOP VIEW
CLOCK
WAIT
CLEAR
Q
SC1
SC0
MRD
BUS 7
BUS 6
BUS 5
BUS 4
BUS 3
BUS 2
BUS 1
BUS 0
VCC
N2
N1
N0
VSS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40 VDD
39 XTAL
38 DMA IN
37 DMA OUT
36 INTERRUPT
35 MWR
34 TPA
33 TPB
32 MA7
31 MA6
30 MA5
29 MA4
28 MA3
27 MA2
26 MA1
25 MA0
24 EF1
23 EF2
22 EF3
21 EF4
CDP1852
INPUT PORT CS2
CS1
DATA CS1
CDP1852 CS2
OUTPUT
PORT
CLOCK
N0 MA0–7
MRD
CDP1802
8–BIT CPU
MWR
N1
TPB DATA TPA
ADDRESS BUS
MA0–7
MRD
CDP1833
1k–ROM
CEO
TPA DATA
8–BIT DATA BUS
FIGURE 1. TYPICAL CDP1802A/3 SMALL MICROPROCESSOR SYSTEM
MA0–4
MRD
CDP1824
32 BYTE RAM
MWR
CS
DATA
FN1441 Rev 3.00
October 17, 2008
Page 2 of 27


Part Number CDP1802AC3
Description High-Reliability CMOS 8-Bit Microprocessor
Maker Intersil Corporation
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CDP1802AC3 Datasheet PDF






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