CDP1802AC3
Overview
- Minimum Instruction Fetch-Execute Time of 4.5µs (Maximum Clock Frequency of 3.6MHz) at VDD = 5V, TA = +25°C
- Any Combination of Standard RAM and ROM Up to 65,536 Bytes
- 8-Bit Parallel Organization With Bi-directional Data Bus and Multiplexed Address Bus
- 16x16 Matrix of Registers for Use as Multiple Program Counters, Data Pointers, or Data Registers
- On-Chip DMA, Interrupt, and Flag Inputs
