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CD4098BMS Datasheet

CMOS Dual Monostable Multivibrator

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CD4098BMS
December 1992
CMOS Dual Monostable Multivibrator
Features
Description
• High Voltage Type (20V Rating)
• Retriggerable/Resettable Capability
• Trigger and Reset Propagation Delays Independent of
RX, CX
• Triggering from Leading or Trailing Edge
• Q and Q Buffered Outputs Available
• Separate Resets
• Wide Range of Output Pulse Widths
• 100% Tested for Quiescent Current at 20V
• 5V, 10V and 15V Parametric Ratings
• Standardized Symmetrical Output Characteristics
• Maximum Input Current of 1µA at 18V Over Full Pack-
age Temperature Range; 100nA at 18V and +25oC
• Noise Margin (Over Full Package/Temperature Range)
- 1V at VDD = 5V
- 2V at VDD = 10V
- 2.5V at VDD = 15V
• Meets All Requirements of JEDEC Tentative Standard
No. 13B, “Standard Specifications for Description of
‘B’ Series CMOS Devices”
Applications
• Pulse Delay and Timing
• Pulse Shaping
Astable Multivibrator
Pinout
CD4098BMS
TOP VIEW
CX1 1
RXCX (1) 2
RESET (1) 3
+TR (1) 4
-TR (1) 5
Q1 6
Q1 7
VSS 8
16 VDD
15 CX2
14 RXCX (2)
13 RESET (2)
12 +TR (2)
11 -TR (2)
10 Q2
9 Q2
CD4098BMS dual monostable multivibrator provides stable
retriggerable/resettable one shot operation for any fixed volt-
age timing application.
An external resistor (RX) and an external capacitor (CX)
control the timing for the circuit. Adjustment of RX and CX
provides a wide range of output pulse widths from the Q and
Q terminals. The time delay from trigger input to output
transition (trigger propagation delay) and the time delay from
reset input to output transition (reset propagation delay) are
independent of RX and CX.
Leading edge triggering (+TR) and trailing edge triggering
(-TR) inputs are provided for triggering from either edge of
an input pulse. An unused +TR input should be tied to VSS.
An unused -TR input should be tied to VDD. A RESET (on
low level) is provided for immediate termination of the output
pulse or to prevent output pulses when power is turned on.
An unused RESET input should be tied to VDD. However, if
an entire section of the CD4098BMS is not used, its RESET
should be tied to VSS. See Table 9.
In normal operation the circuit triggers (extends the output
pulse one period) on the application of each new trigger
pulse. For operation in the non-retriggerable mode, Q is
connected to -TR when leading edge triggering (+TR) is
used or Q is connected to +TR when trailing edge triggering
(-TR) is used.
The time period (T) for this multivibrator can be
approximated by: TX = 1/2RXCX for CX 3 0.01µF. Time
periods as a function of RX for values of CX and VDD are
given in Figure 8. Values of T vary from unit to unit and as a
function of voltage, temperature, and RXCX.
The minimum value of external resistance, RX, is 5k. The
maximum value of external capacitance, CX, is 100µF.
Figure 9 shows time periods as a function of CX for values of
RX and VDD.
The output pulse width has variations of ±2.5% typically, over
the temperature range of -55oC to +125oC for CX = 1000pF
and RX = 100k.
For power supply variations of ±5%, the output pulse width
has variations of ±0.5% typically, for VDD = 10V and 15V
and ±1% typically, for VDD = 5V at CX = 1000pF and
RX = 5k.
The CD4098BMS is supplied in these 16-lead outline packages:
Braze Seal DIP
Frit Seal DIP
Ceramic Flatpack
H4T
H1F
H6W
TERMINALS 1, 8, 15 ARE ELECTRICALLY
CONNECTED INTERNALLY
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
7-482
File Number 3332


Intersil Electronic Components Datasheet

CD4098BMS Datasheet

CMOS Dual Monostable Multivibrator

No Preview Available !

Functional Diagram
CD4098BMS
+TR
-TR
RESET
4
5
3
CX1
RX1
1 2 RXCX (1)
VDD
MONO 1
6
Q1
7 Q1
+TR
-TR
RESET
12
11
13
MONO 2
10 Q2
9 Q2
VDD = 16
VSS = 8
15 14 RXCX (2)
CX2
RX2
VDD
7-483


Part Number CD4098BMS
Description CMOS Dual Monostable Multivibrator
Maker Intersil Corporation
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