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CD4030BMS - CMOS Quad Exclusive-OR Gate

General Description

of ‘B’ Series CMOS Devices” A 1 B 2 J=A⊕B 3 K=C⊕D 4 C 5 D 6 VSS 7 14 VDD 13 H 12 G 11 M = G ⊕ H 10 L = E ⊕ F 9 F 8 E Functional Diagram A B 1 2 3 Applications Even and Odd-Parity Generators and Checkers Logical Comparators Adders/Subtractors General Logic

Key Features

  • High Voltage Type (20V Rating).
  • Medium-Speed Operation - tPHL, tPLH = 65ns (typ) at VDD = 10V, CL = 50pF.
  • 100% Tested for Quiescent Current at 20V.
  • Standardized Symmetrical Output Characteristics.
  • 5V, 10V and 15V Parametric Ratings.
  • Maximum Input Current Of 1µA at 18V Over Full Package-Temperature Range; - 100nA at 18V and +25oC.
  • Noise Margin (Over Full Package Temperature Range): - 1V at VDD = 5V - 2V at VDD = 10V - 2.5V at VDD = 1.

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CD4030BMS December 1992 CMOS Quad Exclusive-OR Gate Pinout CD4030BMS TOP VIEW Features • High Voltage Type (20V Rating) • Medium-Speed Operation - tPHL, tPLH = 65ns (typ) at VDD = 10V, CL = 50pF • 100% Tested for Quiescent Current at 20V • Standardized Symmetrical Output Characteristics • 5V, 10V and 15V Parametric Ratings • Maximum Input Current Of 1µA at 18V Over Full Package-Temperature Range; - 100nA at 18V and +25oC • Noise Margin (Over Full Package Temperature Range): - 1V at VDD = 5V - 2V at VDD = 10V - 2.5V at VDD = 15V • Meets All Requirements of JEDEC Tentative Standard No.