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CD40208BMS - CMOS 4 x 4 Multiport Register

Description

The CD40208BMS is a 4 x 4 multiport register containing four 4-bit registers, write address decoder, two separate read address decoders, and two 3-state output buses.

When the ENABLE input is low, the corresponding output bus is switched, independently of the clock, to a high impedance state.

Features

  • High Voltage Types (20V Rating) One Input and Two Output Buses Unlimited Expansion in Bit and Word Directions Data Lines have Latched Inputs 3-State Outputs Separate Control of Each Bus, Allowing Simultaneous Independent Reading of any of Four Registers on Bus A and Bus B and Independent Writing Into any of the Four Registers 100% Tested for Quiescent Current at 20V Standardized, Symmetrical Output Characteristics 5V, 10V and 15V Parame.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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CD40208BMS December 1992 CMOS 4 x 4 Multiport Register Description The CD40208BMS is a 4 x 4 multiport register containing four 4-bit registers, write address decoder, two separate read address decoders, and two 3-state output buses. When the ENABLE input is low, the corresponding output bus is switched, independently of the clock, to a high impedance state. The high impedance third state provides the outputs with the capability of being connected to the bus lines in a bus organized system without the need for interface or pull-up components. When the WRITE ENABLE input is high, all data input lines are latched on the positive transition of the CLOCK and the data is entered into the word selected by the write address lines.
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