CD4019BMS Datasheet

Part: CD4019BMS
Description: CMOS Quad AND/OR Select Gate
Manufacturer: Intersil
Size: 112.36 KB

Intersil

CD4019BMS

Overview

CD4019BMS types consist of four AND/OR select gate conﬁgurations, each consisting of two 2-input AND gates driving a single 2-input OR gate. Selection is accomplished by control bits Ka and Kb.

High Voltage Type (20V Rating)
Medium Speed Operation tPHL = tPLH = 60ns (typ.) at CL = 50pF, VDD = 10V
Standardized Symmetrical Output Characteristics
100% Tested for Quiescent Current at 20V
5V, 10V and 15V Parametric Ratings
Meets All Requirements of JEDEC Tentative Standard No. 13B, “Standard Speciﬁcations for Description of ‘B’ Series CMOS Devices”
Maximum Input Current of 1µa at 18V Over Full Package-Temperature Range; - 100nA at 18V and 25 oC
Noise Margin (Over Full Package Temperature Range): - 1V at VDD = 5V - 2V at VDD = 10V - 2.5V at VDD = 15V

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