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CD40174BMS Datasheet

CMOS Hex D-Type Flip-Flop

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DATASHEET
CD40174BMS
CMOS Hex ‘D’-Type Flip-Flop
Rev X.00
Jan 13, 2017
Features
• High Voltage Type (20V Rating)
• 5V, 10V and 15V Parametric Ratings
• Standardized, Symmetrical Output Characteristics
• 100% Tested for Quiescent Current at 20V
• Maximum Input Current of 1A at 18V Over Full Pack-
age Temperature Range, 100nA at 18V and +25oC
• Noise Margin (Over full Package Temperature Range):
- 1V at VDD = 5V
- 2V at VDD = 10V
- 2.5V at VDD = 15V
• Meets All Requirements of JEDEC Tentative Standard
No. 13A, “Standard Specifications for Description of
‘B’ Series CMOS Devices”
Pinout
CD40174BMS
TOP VIEW
CLEAR 1
Q1 2
D1 3
D2 4
Q2 5
D3 6
Q3 7
VSS 8
16 VDD
15 Q6
14 D6
13 D5
12 Q5
11 D4
10 Q4
9 CLOCK
Applications
• Shift Registers
• Buffer/Storage Registers
Functional Diagram
D1 3
• Pattern Generators
Description
D2 4
CD40174BMS consists of six identical ‘D’-Type flip-flops
having independent DATA inputs. The CLOCK and CLEAR
inputs are common to all six units. Data is transferred to the
Q outputs on the positive going transition of the clock pulse.
All six flip-flops are simultaneously reset by a low level on
the CLEAR input.
The CD40174BMS is supplied in these 16 lead outline pack-
ages:
Braze Seal DIP H4T
D3 6
D4 11
D5 13
Frit Seal DIP
H1E
Ceramic Flatpack H6W
D5 14
CLOCK 9
CLEAR 1
VSS = 8
VDD = 16
F/F1
F/F2
F/F3
F/F4
F/F5
F/F6
2 Q1
5 Q2
7 Q3
10 Q4
12 Q5
15 Q6
Rev X.00
Jan 13, 2017
Page 1 of 8


Intersil Electronic Components Datasheet

CD40174BMS Datasheet

CMOS Hex D-Type Flip-Flop

No Preview Available !

CD40174BMS
Specifications CD40174BMS
Absolute Maximum Ratings
DC Supply Voltage Range, (VDD) . . . . . . . . . . . . . . . -0.5V to +20V
(Voltage Referenced to VSS Terminals)
Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VDD +0.5V
DC Input Current, Any One Input  10mA
Operating Temperature Range . . . . . . . . . . . . . . . . -55oC to +125oC
Package Types D, F, K, H
Storage Temperature Range (TSTG) . . . . . . . . . . . -65oC to +150oC
Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . +265oC
At Distance 1/16 1/32 Inch (1.59mm 0.79mm) from case for
10s Maximum
Reliability Information
Thermal Resistance . . . . . . . . . . . . . . . .
Ceramic DIP and FRIT Package . . . . .
80oCja/W
20oCjc/W
Flatpack Package . . . . . . . . . . . . . . . . 70oC/W
20oC/W
Maximum Package Power Dissipation (PD) at +125oC
For TA = -55oC to +100oC (Package Type D, F, K) . . . . . . 500mW
For TA = +100oC to +125oC (Package Type D, F, K) . . . . . Derate
Linearity at 12mW/oC to 200mW
Device Dissipation per Output Transistor . . . . . . . . . . . . . . . 100mW
For TA = Full Package Temperature Range (All Package Types)
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
SYMBOL
CONDITIONS (NOTE 1)
GROUP A
SUBGROUPS TEMPERATURE
LIMITS
MIN MAX UNITS
Supply Current
IDD VDD = 20V, VIN = VDD or GND
1
+25oC
- 2 A
2
+125oC
- 200 A
VDD = 18V, VIN = VDD or GND
3
-55oC
- 2 A
Input Leakage Current
IIL VIN = VDD or GND VDD = 20
1
+25oC
-100
-
nA
2
+125oC
-1000 -
nA
VDD = 18V
3
-55oC
-100
-
nA
Input Leakage Current
IIH VIN = VDD or GND VDD = 20
1
+25oC
- 100 nA
2
+125oC
- 1000 nA
VDD = 18V
3
-55oC
- 100 nA
Output Voltage
VOL15 VDD = 15V, No Load
1, 2, 3
+25oC, +125oC, -55oC -
50 mV
Output Voltage
VOH15 VDD = 15V, No Load (Note 3)
1, 2, 3
+25oC, +125oC, -55oC 14.95
-
V
Output Current (Sink)
IOL5 VDD = 5V, VOUT = 0.4V
1
+25oC
0.53 - mA
Output Current (Sink)
IOL10 VDD = 10V, VOUT = 0.5V
1
+25oC
1.4 - mA
Output Current (Sink)
IOL15 VDD = 15V, VOUT = 1.5V
1
+25oC
3.5 - mA
Output Current (Source) IOH5A VDD = 5V, VOUT = 4.6V
1
+25oC
- -0.53 mA
Output Current (Source) IOH5B VDD = 5V, VOUT = 2.5V
1
+25oC
- -1.8 mA
Output Current (Source) IOH10 VDD = 10V, VOUT = 9.5V
1
+25oC
- -1.4 mA
Output Current (Source) IOH15 VDD = 15V, VOUT = 13.5V
1
+25oC
- -3.5 mA
N Threshold Voltage
VNTH VDD = 10V, ISS = -10A
1
+25oC
-2.8 -0.7
V
P Threshold Voltage
VPTH VSS = 0V, IDD = 10A
1
+25oC
0.7 2.8
V
Functional
F VDD = 2.8V, VIN = VDD or GND
VDD = 20V, VIN = VDD or GND
7
7
+25oC
+25oC
VOH > VOL < V
VDD/2 VDD/2
VDD = 18V, VIN = VDD or GND
8A
+125oC
VDD = 3V, VIN = VDD or GND
8B
-55oC
Input Voltage Low
(Note 2)
VIL5 VDD = 5V, VOH > 4.5V, VOL < 0.5V
1, 2, 3
+25oC, +125oC, -55oC -
1.5 V
Input Voltage High
(Note 2)
VIH5 VDD = 5V, VOH > 4.5V,
VOL < 0.5V
1, 2, 3
+25oC, +125oC, -55oC 3.5
-
V
Input Voltage Low
(Note 2)
VIL15 VDD = 15V, VOH > 13.5V,
VOL < 1.5V
1, 2, 3
+25oC, +125oC, -55oC -
4V
Input Voltage High
(Note 2)
VIH15 VDD = 15V, VOH > 13.5V,
VOL < 1.5V
1, 2, 3
+25oC, +125oC, -55oC 11
-
V
NOTES: 1. All voltages referenced to device GND, 100% testing being 3. For accuracy, voltage is measured differentially to VDD. Limit
implemented.
is 0.050V max.
2. Go/No Go test with limits applied to inputs.
Rev X.00
Jan 13, 2017
Page 2 of 8


Part Number CD40174BMS
Description CMOS Hex D-Type Flip-Flop
Maker Intersil Corporation
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CD40174BMS Datasheet PDF






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