CD4011BT Datasheet | Intersil

Features - QML Class T, Per MIL-PRF-38535 - Radiation Performance - Gamma Dose (γ) 1 x 105 RAD(Si) - SEP Effective LET > 75 MEV/gm/cm2 - Propagation Delay Time = 60ns (typ.) at CL = 50p F, VDD = 10V - Buffered Inputs and Outputs - Standardized Symmetrical Output Characteristics - 100% Tested for Maximum Quiescent Current at 20V Specifications Specifications for Rad Hard QML devices are controlled by the Defense Supply Center in Columbus (DSCC). The SMD numbers listed below must be used when ordering. Detailed Electrical Specifications for the CD4011BT are contained in SMD 5962-96621. A “hot-link” is provided from our website for downloading. .intersil./quality/manuals.asp Intersil’s Quality Management Plan (QM Plan), listing all Class T screening operations, is also available on our website. .intersil./quality/manuals.asp - 5V, 10V and 15V Parametric Ratings Pinouts CD4011BT (SBDIP), CDIP2-T14 TOP VIEW A 1 B 2 J = AB 3 K = CD 4 C 5 D 6 VSS 7 14 VDD 13 H 12 G 11 M = GH 10 L = EF 9 E 8 F Ordering Information ORDERING NUMBER 5962R9662101TCC 5962R9662101TXC PART NUMBER CD4011BDTR CD4011BKTR TEMP. RANGE (o C) -55 to 125 -55 to 125 A B J = AB K = CD C D VSS CD4011BT (FLATPACK), CDFP3-F14 TOP VIEW 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VDD H G M = GH L = EF E F NOTE: Minimum order quantity for -T is 150 units through distribution, or 450 units direct. CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. .intersil. or 407-727-9207 | Copyright © Intersil Corporation 1999 CD4011BT Schematic and Logic Diagram p 1† n (8, 6, 13) 2† (9, 5, 12) n p VDD p p p 3 (10, 4, 11) n VDD n n † ALL INPUTS ARE PROTECTED BY CMOS PROTECTION NETWORK 1 OF 4 GATES (NUMBERS IN PARENTHESES ARE TERMINAL NUMBERS FOR OTHER GATES) 1(8, 6,13) 3 (10, 4, 11) 2(9, 5, 12) LOGIC DIAGRAM CD4011BT Die Characteristics DIE DIMENSIONS: (1143µm x 1626µm x 533µm ±25.4µm) 45 x 64 x 21mils ±1mil METALLIZATION: Type: Al Thickness: 12.5kÅ...