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Intersil Electronic Components Datasheet

CD4008BMS Datasheet

CMOS 4-Bit Full Adder

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DATASHEET
CD4008BMS
CMOS 4-Bit Full Adder With Parallel Carry Out
FN3292
Rev 0.00
November 1994
Features
• High-Voltage Type (20V Rating)
• 4 Sum Outputs Plus Parallel Look-ahead Carry-Output
• High-Speed Operation - Sum In-To-Sum Out, 160ns
Typ; Carry In-To-Carry Out, 5ns Typ. At VDD = 10V,
CL=50pF
• Standardized Symmetrical Output Characteristics
• 100% Tested For Quiescent Current At 20V
• Maximum Input Current of 1a at 18V Over Full Pack-
age-Temperature Range;
- 100nA at 18V and 25oC
• Noise Margin (Over Full Package Temperature Range):
- 1V at VDD = 5V
- 2V at VDD = 10V
- 2.5V at VDD = 15V
• 5V, 10V and 15V Parametric Ratings
• Meets All Requirements of JEDEC Tentative Standard
No. 13B, “Standard Specifications for Description of
‘B’ Series CMOS Devices”
Applications
• Binary Addition/Arithmetic Units
Description
CD4008BMS types consist of four full adder stages with fast
look ahead carry provision from stage to stage. Circuitry is
included to provide a fast “parallel-carry-out” but to permit
high-speed operation in arithmetic sections using several
CD4008BMS’s.
CD4008BMS inputs include the four sets of bits to be added,
A1 to A4 and B1 to B4, in addition to the “Carry In” bit from a
previous section. CD4008BMS outputs include the four sum
bits, S1 to S4. In addition to the high speed “parallel-carry-
out” which may be utilized at a succeeding CD4008BMS sec-
tion.
The CD4008BMS is supplied in these 16-lead outline pack-
ages:
Braze Seal DIP H4T
Frit Seal DIP
H1F
Ceramic Flatpack H6W
Pinout
CD4008BMS
TOP VIEW
A4 1
B3 2
A3 3
B2 4
A2 5
B1 6
A1 7
VSS 8
16 VDD
15 B4
14 CO
13 S4
12 S3
11 S2
10 S1
9 C1
Logic Diagram
HIGH SPEED
PAR CARRY
B4 * 15
A4 * 1
B3 * 2
A3 * 3
14
(CARRY-OUT)
CO
SUM
C4
SUM
13
S4
12 S3
B2 * 4
A2 * 5
C3
SUM
11
S2
B1 * 6
A1 * 7
C1 * 9
(CARRY-IN)
C2
SUM
10
S1
VDD = 16
VSS = 8
*ALL INPUTS ARE PROTECTED
BY CMOS PROTECTION
NETWORK
VDD
VSS
TRUTH TABLE
Ai Bi Ci CO SUM
00000
10001
01001
11010
00101
10110
01110
11111
FN3292 Rev 0.00
November 1994
Page 1 of 8


Intersil Electronic Components Datasheet

CD4008BMS Datasheet

CMOS 4-Bit Full Adder

No Preview Available !

CD4008BMS
Absolute Maximum Ratings
DC Supply Voltage Range, (VDD) . . . . . . . . . . . . . . . -0.5V to +20V
(Voltage Referenced to VSS Terminals)
Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VDD +0.5V
DC Input Current, Any One Input  10mA
Operating Temperature Range . . . . . . . . . . . . . . . . -55oC to +125oC
Package Types D, F, K, H
Storage Temperature Range (TSTG) . . . . . . . . . . . -65oC to +150oC
Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . +265oC
At Distance 1/16 1/32 Inch (1.59mm 0.79mm) from case for
10s Maximum
Reliability Information
Thermal Resistance . . . . . . . . . . . . . . . .
Ceramic DIP and FRIT Package . . . . .
80oCja/W
20oCjc/W
Flatpack Package . . . . . . . . . . . . . . . . 70oC/W
20oC/W
Maximum Package Power Dissipation (PD) at +125oC
For TA = -55oC to +100oC (Package Type D, F, K) . . . . . . 500mW
For TA = +100oC to +125oC (Package Type D, F, K) . . . . . Derate
Linearity at 12mW/oC to 200mW
Device Dissipation per Output Transistor . . . . . . . . . . . . . . . 100mW
For TA = Full Package Temperature Range (All Package Types)
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
SYMBOL
CONDITIONS (NOTE 1)
GROUP A
SUBGROUPS TEMPERATURE
LIMITS
MIN MAX UNITS
Supply Current
IDD VDD = 20V, VIN = VDD or GND
1
+25oC
- 10 A
2
+125oC
- 1000 A
VDD = 18V, VIN = VDD or GND
3
-55oC
- 10 A
Input Leakage Current
IIL VIN = VDD or GND VDD = 20
1
+25oC
-100
-
nA
2
+125oC
-1000 -
nA
VDD = 18V
3
-55oC
-100
-
nA
Input Leakage Current
IIH VIN = VDD or GND VDD = 20
1
+25oC
- 100 nA
2
+125oC
- 1000 nA
VDD = 18V
3
-55oC
- 100 nA
Output Voltage
VOL15 VDD = 15V, No Load
1, 3 +25oC, +125oC, -55oC - 50 mV
Output Voltage
VOH15 VDD = 15V, No Load (Note 3)
1, 3
+25oC, +125oC, -55oC 14.95
-
V
Output Current (Sink)
IOL5 VDD = 5V, VOUT = 0.4V
1
+25oC
0.53 - mA
Output Current (Sink)
IOL10 VDD = 10V, VOUT = 0.5V
1
+25oC
1.4 - mA
Output Current (Sink)
IOL15 VDD = 15V, VOUT = 1.5V
1
+25oC
3.5 - mA
Output Current (Source) IOH5A VDD = 5V, VOUT = 4.6V
1
+25oC
- -0.53 mA
Output Current (Source) IOH5B VDD = 5V, VOUT = 2.5V
1
+25oC
- -1.8 mA
Output Current (Source) IOH10 VDD = 10V, VOUT = 9.5V
1
+25oC
- -1.4 mA
Output Current (Source) IOH15 VDD = 15V, VOUT = 13.5V
1
+25oC
- -3.5 mA
N Threshold Voltage
VNTH VDD = 10V, ISS = -10A
1
+25oC
-2.8 -0.7
V
P Threshold Voltage
VPTH VSS = 0V, IDD = 10A
1
+25oC
0.7 2.8
V
Functional
F VDD = 2.8V, VIN = VDD or GND
VDD = 20V, VIN = VDD or GND
7
7
+25oC
+25oC
VOH > VOL < V
VDD/2 VDD/2
VDD = 18V, VIN = VDD or GND
8A
+125oC
VDD = 3V, VIN = VDD or GND
8B
-55oC
Input Voltage Low
(Note 2)
VIL VDD = 5V, VOH > 4.5V, VOL < 0.5V
1, 2, 3
+25oC, +125oC, -55oC -
1.5 V
Input Voltage High
(Note 2)
VIH VDD = 5V, VOH > 4.5V, VOL < 0.5V
1, 2, 3
+25oC, +125oC, -55oC 3.5
-
V
Input Voltage Low
(Note 2)
VIL VDD = 15V, VOH > 13.5V,
VOL < 1.5V
1, 2, 3
+25oC, +125oC, -55oC -
4V
Input Voltage High
(Note 2)
VIH VDD = 15V, VOH > 13.5V,
VOL < 1.5V
1, 2, 3
+25oC, +125oC, -55oC 11
-
V
NOTES: 1. All voltages referenced to device GND, 100% testing being 3. For accuracy, voltage is measured differentially to VDD. Limit
implemented.
is 0.050V max.
2. Go/No Go test with limits applied to inputs
FN3292 Rev 0.00
November 1994
Page 2 of 8


Part Number CD4008BMS
Description CMOS 4-Bit Full Adder
Maker Intersil Corporation
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CD4008BMS Datasheet PDF






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