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Intersil Electronic Components Datasheet

CD4001BMS Datasheet

CMOS NOR Gate

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CD4000BMS, CD4001BMS
CD4002BMS, CD4025BMS
November 1994
CMOS NOR Gate
Features
Pinouts
• High-Voltage Types (20V Rating)
• Propagation Delay Time = 60ns (typ.) at CL = 50pF,
VDD = 10V
• Buffered Inputs and Outputs
• Standard Symmetrical Output Characteristics
• 100% Tested for Maximum Quiescent Current at 20V
• 5V, 10V and 15V Parametric Ratings
• Maximum Input Current of 1µA at 18V Over Full Pack-
age-Temperature Range; 100nA at 18V and +25oC
• Noise Margin (Over Full Package Temperature Range):
- 1V at VDD = 5V
- 2V at VDD = 10V
- 2.5V at VDD = 15V
• Meets All Requirements of JEDEC Tentative Stan-
dards No. 13B, “Standard Specifications for Descrip-
tion of “B” Series CMOS Device’s
Description
CD4000BMS
CD4001BMS
CD4002BMS
CD4025BMS
- Dual 3 Plus Inverter
- Quad 2 Input
- Dual 4 Input
- Triple 3 Input
CD4000BMS
TOP VIEW
NC 1
14 VDD
NC 2
13 F
A3
12 E
B4
11 D
C5
10 K = D + E + F
H=A+B+C 6
9 L=G
VSS 7
8G
NC = NO CONNECTION
CD4001BMS
TOP VIEW
A1
14 VDD
B2
13 H
J=A+B 3
12 G
K=C+D 4
11 M = G + H
C5
10 L = E + F
D6
9F
VSS 7
8E
NC = NO CONNECTION
CD4002BMS
TOP VIEW
CD4000BMS, CD4001BMS, CD4002BMS, and
CD4025BMS NOR gates provide the system designer with
direct implementation of the NOR function and supplement
the existing family of CMOS gates. All inputs and outputs are
buffered.
The CD4000BMS, CD4001BMS, CD4002BMS and the
CD4025BMS is supplied in these 14 lead outline packages:
CD4000B CD4001B CD4002B CD4025B
Braze Seal DIP
Frit Seal DIP
Ceramic Flatpack
H4X
H1B
H3W
H4Q
H1B
H3W
H4Q
H1B
H3W
H4Q
H1B
H3W
J=A+B+C+D 1
14 VDD
A2
13 K = E + F + G + H
B3
12 H
C4
11 G
D5
10 F
NC 6
9E
VSS 7
8 NC
NC = NO CONNECTION
CD4025BMS
TOP VIEW
A1
B2
D3
14 VDD
13 G
12 H
E4
F5
K=D+E+F 6
VSS 7
11 I
10 L = G + H + I
9 J=A+B+C
8C
NC = NO CONNECTION
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
7-649
File Number 3289


Intersil Electronic Components Datasheet

CD4001BMS Datasheet

CMOS NOR Gate

No Preview Available !

CD4000BMS, CD4001BMS, CD4002BMS, CD4025BMS
Functional Diagrams
NC 1
NC 2
A3
B4
C5
H6
VSS 7
K=D+E+F
14 VDD
13 F
12 E
11 D
H=A+B+C
10 K
9L
L=G
CD4000BMS
8G
A 1 J=A+B
M = G + H 14 VDD
B2
13 H
J3
K=C+D
K4
12 G
11 M
C5
10 L
D6
VSS 7
L=E+F
CD4001BMS
9F
8E
J1
J=A+B+C+D
A2
14 VDD
13 K
B3
12 H
C4
11 G
D5
10 F
NC 6
VSS 7
K=E+F+G+H
9E
8 NC
CD4002BMS
A1
14 VDD
B2
D3
13 G
L=G+H+I
12 H
E4
11 I
F5
10 L
K6
K=D+E+F
VSS 7
J=A+B+C
CD4025BMS
9J
8C
7-650


Part Number CD4001BMS
Description CMOS NOR Gate
Maker Intersil Corporation
Total Page 9 Pages
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