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Intersil Electronic Components Datasheet

CDP1833 Datasheet

CMOS 7-Bit Latch and Decoder Memory Interface

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March 1997
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CDP1883,
CDP1883C
CMOS 7-Bit Latch
and Decoder Memory Interfaces
Features
• Performs Memory Address Latch and Decoder Func-
tions Multiplexed or Non-Multiplexed
• Interfaces Directly with the CDP1800-Series Micropro-
cessors
• Allows Decoding for Systems Up to 32K Bytes
Ordering Information
5V 10V
CDP1883CE CDP1883E
TEMP.
RANGE
-40oC to
+85oC
PKG.
PACKAGE NO.
PDIP
E20.3
Description
The CDP1883 is a CMOS 7-bit memory latch and decoder
circuit intended for use in CDP1800-series microprocessor
systems. It can serve as a direct interface between the multi-
plexed address bus of this system and up to four 8K x 8-bit
memories to implement a 32K-byte memory system. With
four 4K x 8-bit memories, a 16K-byte system can be
decoded.
The device is also compatible with non-multiplexed address
bus microprocessors. By connecting the clock input to VDD,
the latches are in the data-following mode and the decoded
outputs can be used in general-purpose memory-system
applications.
The CDP1833 is compatible with CDP1800-series micropro-
cessors operating at maximum clock frequency.
The CDP1883 and CDP1883C are functionally identical.
They differ in that the CDP1883 has a recommended operat-
ing voltage range of 4V to 10.5V and the C version has a
recommended operating voltage range of 4V to 6.5V.
The CDP1883 and CDP1883C are supplied in 20 lead dual-
in-line plastic packages (E Suffix).
Pinout
CDP1883, CDP1883C
(PDIP)
TOP VIEW
CLOCK 1
MA0 2
MA1 3
MA2 4
MA3 5
MA4 6
MA5 7
MA6 8
CE 9
VSS 10
20 VDD
19 A8
18 A9
17 A10
16 A11
15 A12
14 CS0
13 CS1
12 CS2
11 CS3
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
4-129
File Number 1507.2


Intersil Electronic Components Datasheet

CDP1833 Datasheet

CMOS 7-Bit Latch and Decoder Memory Interface

No Preview Available !

www.DataSheet4U.com
CDP1883, CDP1883C
Absolute Maximum Ratings
Thermal Information
DC Supply Voltage Range, (VDD)
(All Voltages Referenced to VSS Terminal)
CDP1883 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +11V
CDP1883C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7V
Input Voltage Range, All Inputs . . . . . . . . . . . . . -0.5V to VDD +0.5V
DC Input Current, Any One Input. . . . . . . . . . . . . . . . . . . . . . . . .±10mA
Thermal Resistance (Typical)
θJA (oC/W)
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
80
Device Dissipation Per Output Transistor
TA = Full Package Temperature Range . . . . . . . . . . . . . . . 100mW
Operating Temperature
Package Type E . . . .
Range
......
(TA)
....
.
.
.
.
.
.
.
.
.
.
.
.
.-40oC
to
+85oC
Storage Temperature Range (TSTG). . . . . . . . . . . .-65oC to +150oC
Lead Temperature (During Soldering)
At distance 1/16 ±1/32 In. (1.59 ± 0.79mm)
from case for 10s max . . . . . . . . . . . . . . . . . . . . . . . . . . . . +265oC
CAUTION: Stresses above those listed in the “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and opera-
tion of the device at these or any other conditions above those indicated in the operation section of this specification is not implied.
Recommended Operating Conditions At TA = Full Package Temperature Range. For maximum reliability, operating conditions
should be selected so that operation is always within the following ranges:
CDP1883
CDP1883C
PARAMETER
SYMBOL
MIN
MAX
MIN
MAX
UNITS
DC Operating Voltage Range
Input Voltage Range
4 10.5 4
6.5 V
VSS
VDD
VSS
VDD
V
Static Electrical Specifications At TA = -40oC to +85oC, VDD ± 5%, Except as Noted:
CONDITIONS
CDP1883
CDP1883C
PARAMETER
SYMBOL
VO
(V)
VIN VDD
(NOTE 1)
(NOTE 1)
(V) (V) MIN TYP MAX MIN TYP MAX UNITS
Quiescent Device
Current
IDD - 0, 5 5 -
1 10 -
-
0, 10
10
-
10 100 -
5 50 µA
- - µA
Output Low Drive
(Sink) Current
IOL 0.4 0, 5 5 1.6 3.2
0.5 0, 10 10
3.2
6.4
- 1.6 3.2
--
-
- mA
- mA
Output High Drive
(Source) Current
IOH
4.6 0, 5
5
-1.15
-2.3
9.5 0, 10 10 -2.3 -4.6
- -1.15 -2.3
--
-
- mA
- mA
Output Voltage
Low-Level (Note 2)
VOL - 0, 5 5 -
-
0, 10
10
-
0 0.1 -
0 0.1 -
0 0.1 V
- -V
Output Voltage
High-Level (Note 2)
VOH
- 0, 5 5 4.9
5
-
0, 10
10
9.9
10
- 4.9
--
5
-
-V
-V
Input Low Voltage
VIL 0.5, 4.5 - 5 -
0.5, 9.5
-
10 -
- 1.5 -
- 3-
- 1.5 V
- -V
Input High Voltage
VIH 0.5, 4.5
0.5, 9.5
-
-
5 3.5
10 7
-
-
- 3.5
--
-
-
-V
-V
Input Leakage Current
IIN
Any
Input
0, 5
0, 10
5
10
-
-
- ±1 -
- ±2 -
- ±1 µA
- - µA
Operating Current
(Note 3)
IDD1
0, 5
0, 10
0, 5
0, 10
5
10
-
-
- 2-
- 4-
- 2 mA
- - mA
4-130


Part Number CDP1833
Description CMOS 7-Bit Latch and Decoder Memory Interface
Maker Intersil
PDF Download

CDP1833 Datasheet PDF






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