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PD- 95718
IRFPG30PbF
Lead-Free
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1
8/3/04
IRFPG30PbF
2
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IRFPG30PbF
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3
IRFPG30PbF
4
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IRFPG30PbF
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IRFPG30PbF
6
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IRFPG30PbF
Peak Diode Recovery dv/dt Test Circuit
+
Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer
+ +
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• dv/dt controlled by RG • ISD controlled by Duty Factor "D" • D.U.T. - Device Under Test
+ -
*
Reverse Polarity for P-Channel ** Use P-Channel Driver for P-Channel Measurements
Driver Gate Drive P.W. Period D=
P.W. Period VGS=10V
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T.