N82C55A interface equivalent, chmos programmable peripheral interface.
or ‘‘personality’’ to further enhance the power and flexibility of the 82C55A Port A One 8-bit data output latch buffer and one 8-bit input latch buffer Both ‘‘pull-up’’ .
231256
–5
Figure 5 Basic Mode Definitions and Bus Interface
When Port C is being used as status contro.
Symbol PA3
–0 RD CS Pin Number Dip PLCC 1
– 4 5 6 2
–5 6 7 Type I O I I Name and Function PORT A PINS 0
– 3 Lower nibble of an 8-bit data output latch buffer and an 8-bit data input latch R.
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