83C152JB Datasheet | Intel Corporation

8XC152JA JB JC JD UNIVERSAL MUNICATION CONTROLLER 8-BIT MICROCONTROLLER X 8K Factory Mask Programmable ROM Available Y Y Superset of 80C51 Architecture Multi-Protocol Serial munication I O Port (2 048 Mbps 2 4 Mbps Max) SDLC HDLC Only CSMA CD and SDLC HDLC User Definable Protocols Full Duplex Half Duplex MCS -51 patible UART 16 5 MHz Maximum Clock Frequency Multiple Power Conservation Modes 64KB Program Memory Addressing Y Y Y Y Y Y Y Y Y 64KB Data Memory Addressing 256 Bytes On-Chip RAM Dual On-Chip DMA Channels Hold Hold Acknowledge Two General Purpose Timer Counters 5 or 7 I O Ports 56 Special Function Registers 11 Interrupt Sources Available in 48 Pin Dual-in-Line Package and 68 Pin Surface Mount PLCC Package (See Packaging Spec Order 231369) Y Y Y Y Y The 80C152 which is based on the MCS -51 CPU is a highly integrated single-chip 8-bit microcontroller designed for cost-sensitive high-speed serial munications It is well suited for implementing Integrated Services Digital Networks (ISDN) emerging Local Area Networks and user defined serial backplane applications In addition to the multi-protocol munication capability the 80C152 offers traditional microcontroller Features for peripheral I O interface and control Silicon implementations are much more cost effective than multi-wire cables found in board level parallel-toserial and serial-to-parallel converters The 83C152 contains in silicon all the Features needed for the serialto-parallel conversion Other 83C152 benefits include 1) better noise immunity through differential signaling or .. fiber optic connections 2) data integrity utilizing the standard designed in CRC checks and 3) better modularity of hardware and software designs All of these cost network parameter and real...