s High-Density Symmetrically-Blocked Architecture
— 64 128-Kbyte Erase Blocks (64 M)
— 32 128-Kbyte Erase Blocks (32 M)
s 4.5 V –5.5 V VCC Operation — 2.7 V –3.6 V and 4.5 V –5.5 V I/O Capable
s 120 ns .
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